MAX1032_11 Datasheet, PDF (13/32 Pages) Maxim Integrated Products – 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs

8- and 4-Channel, ±3 x V_REF
Multirange Inputs, Serial 14-Bit ADCs
Pin Description (continued)
PIN
MAX1032 MAX1033
22
19
23
20
24
1
NAME
AVDD2
AGND2
AGND1
FUNCTION
Analog Supply Voltage 2. Connect AVDD2 to a 4.75V to 5.25V power-supply voltage. Bypass
AVDD2 to AGND2 with a 0.1µF capacitor.
Analog Ground 2. This ground carries approximately five times more current than AGND1.
DGND, DGNDO, AGND3, AGND2, and AGND1 must be connected together.
Analog Ground 1. DGND, DGNDO, AGND3, AGND2, and AGND1 must be connected together.
5.0V
5.0V
5.0V
0.1µF
0.1µF
0.1µF
4–20mA
PLC
ACCELERATION
PRESSURE
TEMPERATURE
WHEATESTONE
WHEATESTONE
1µF
0.1µF
AVDD2
AVDD1
DVDD
CHO
CH1
DVDD0
CH2
CH3
CH4
CH5
MAX1032
SCLK
CH6
CS
CH7
DIN
REF
SSTRB
AGND1
DOUT
REFCAP
AGND2 AGND3 DGND DGNDO
3.3V
V_DD
0.1µF _MC68HCXX
µC
SCK
I/O
MOSI
I/O
MISO
V_SS
Figure 1. Typical Application Circuit
Detailed Description
The MAX1032/MAX1033 multirange, low-power, 14-bit
successive-approximation ADCs operate from a single
+5V supply and have a separate digital supply allowing
digital interface with 2.7V to 5.25V systems. These 14-bit
ADCs have internal track-and-hold (T/H) circuitry that
supports single-ended and fully differential inputs. For
single-ended conversions, the valid analog input voltage
range spans from -3 x V_REF below ground to +3 x V_REF
above ground. The maximum allowable differential input
voltage spans from -6 x V_REF to +6 x V_REF. Data can be
converted in a variety of software-programmable chan-
nel and data-acquisition configurations. Microprocessor
(µP) control is made easy through an SPI-/QSPI-/
MICROWIRE-compatible serial interface.
The MAX1032 has eight single-ended analog input
channels or four differential channels (see the Block
Diagram at the end of the data sheet). The MAX1033 has
four single-ended analog input channels or two differential
channels. Each analog input channel is independently soft-
ware programmable for seven single-ended input ranges
(0 to (3 x V_REF)/2, (-3 x V_REF)/2 to 0, 0 to 3 x V_REF, -3 x
V_REF to 0, (±3 x V_REF)/4, (±3 x V_REF)/2_, ±3 x V_REF) and
three differential input ranges (±3 x V_REF)/2, ±3 x V_REF, ±6
x V_REF. Additionally, all analog input channels are fault tol-
erant to ±16.5V. A fault condition on an idle channel does
not affect the conversion result of other channels.
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