DS1339A Datasheet, PDF (17/19 Pages) Maxim Integrated Products – Low-Current, I2C, Serial Real-Time Clock

DS1339A
Low-Current, I²C, Serial Real-Time Clock
generates a START condition, writes the slave address
byte (R/W = 0), writes the memory address where
it desires to read, generates a repeated START
condition, writes the slave address byte (R/W = 1),
reads data with ACK or NACK as applicable, and
generates a STOP condition. See Figure 5 for a
read example using the repeated START condition to
specify the starting memory location.
Reading Multiple Bytes From a Slave: The read
operation can be used to read multiple bytes with a
single transfer. When reading bytes from the slave, the
master simply ACKs the data byte if it desires to read
another byte before terminating the transaction. After
the master reads the last byte it must NACK to indicate
the end of the transfer and then it generates a STOP
condition.
Applications Information
Power-Supply Decoupling
To achieve the best results when using the DS1339A,
decouple the V_CC power supply with a 0.01FF and/or
0.1FF capacitor. Use a high-quality, ceramic, surface-
mount capacitor if possible. Surface-mount components
minimize lead inductance, which improves performance,
and ceramic capacitors tend to have adequate high-
frequency response for decoupling applications.
Using an Open-Drain Output
The SQW/INT output is open-drain and therefore requires
an external pullup resistor to realize a logic-high output
level.
SDA and SCL Pullup Resistors
SDA is an open-drain output and requires an external
pullup resistor to realize a logic-high output level.
Because the DS1339A does not use clock cycle
stretching, a master using either an open-drain output
with a pullup resistor or CMOS output driver (push-pull)
could be used for SCL.
Battery Charge Protection
The DS1339A contains Maxim’s redundant battery-
charge protection circuit to prevent any charging of an
external battery.
Handling, PCB Layout, and Assembly
Avoid running signal traces under the package, unless
a ground plane is placed between the package and the
signal line. Do not use external components to compen-
sate for improper crystal selection.
Moisture-sensitive packages are shipped from the fac-
tory dry-packed. Handling instructions listed on the pack-
age label must be followed to prevent damage during
reflow. Refer to the IPC/JEDEC J-STD-020 standard for
moisture-sensitive device (MSD) classifications.
CRYSTAL
Figure 6. Typical PCB Layout for Crystal
X1
X2
LOCAL GROUND PLANE (LAYER 2)
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