MAX15109 Datasheet, PDF (16/19 Pages) Maxim Integrated Products – High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator

High-Efficiency, 8A, Current-Mode Synchronous
Step-Down Switching Regulator with VID Control
If the ESR output zero is located at less than one-half
the switching frequency, use the (optional) secondary
compensation capacitor, CCC, to cancel it, as follows:
1
2π × C_CCR_C
=
f_P3
=
f_Z2
=
1
2π × C_OUTESR
therefore:
C _CC
=
C_OUT ×
R_C
ESR
If the ESR zero exceeds 1/2 the switching frequency,
use the following equation:
f_P3
=
1
2π × C_CCR_C
=
f_SW
2
therefore:
C _CC
=
2π
×
2
f_SW
×
R_C
Overall CCC detracts from the overall system phase
margin. Place this third pole well beyond the desired
crossover frequency to minimize the interaction with the
system loop response at crossover. Ignore CCC in these
calculations if CCC is smaller than 10pF.
Power Dissipation
The IC is available in a 20-bump WLP package and can
dissipate up to 745.5mW at TA = +70NC. When the die
temperature exceeds +160NC, the thermal-shutdown
protection is activated. See the Thermal Shutdown
Protection section.
GAIN
1ST ASYMPTOTE
V_FB x V_OUT ^-1 x 10^AVEA[dB]/20 x G_MOD x R_LOAD
2ND ASYMPTOTE
V_FB x V_OUT ^-1 x g_MV x (C_C)^-1 x G_MOD x R_LOAD
UNITY
1ST POLE
g_MV x (10^AVEA[dB]/20 C_C)^-1
3RD ASYMPTOTE
V_FB x V_OUT ^-1 x g_MV x (C_C)^-1 x G_MOD x R_LOAD x (C_OUT(ESR + R_LOAD))^-1
1ST ZERO
(C_CR_C)^-1
2ND POLE
(C_OUT(ESR + R_LOAD))^-1
4TH ASYMPTOTE
V_FB x V_OUT ^-1 x g_MV x R_C x G_MOD x R_LOAD x (C_OUT(ESR + R_LOAD))^-1
3RD POLE
(C_CCR_C)^-1
2ND ZERO
(C_OUTESR)^-1
RAD/S
CO
5TH ASYMPTOTE
V_FB x V_OUT ^-1 x g_MV x R_C x G_MOD x (ESR || R_LOAD)
6TH ASYMPTOTE
V_FB x V_OUT ^-1 x g_MV x (C_CC)^-1 x G_MOD x (ESR || R_LOAD)
Figure 4. Asymptotic Loop Response of Peak Current-Mode Regulator
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