MAX15109 Datasheet, PDF (15/19 Pages) Maxim Integrated Products – High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator

High-Efficiency, 8A, Current-Mode Synchronous
Step-Down Switching Regulator with VID Control
The order of pole-zero occurrence is:
f_P1 < f_P2 < f_Z1 < f_Z2 ≤ f_P3
Under heavy load, fP2, approaches fZ1. A graphical
representation of the asymptotic system closed-loop
response, including dominant pole and zero locations is
shown in Figure 3.
If COUT is large, or exhibits a lossy equivalent series
resistance (large ESR), the circuit’s second zero
might come into play around the crossover frequency
(fCO = ω/2G). In this case, a third pole can be induced
by a second (optional) small compensation capaci-
tor (CCC), connected from COMP to PGND. The loop
response’s fourth asymptote (in bold, Figure 4) is the
one of interest in establishing the desired crossover fre-
quency (and determining the compensation component
values). A lower crossover frequency provides for stable
closed-loop operation at the expense of a slower load
and line transient response. Increasing the crossover
frequency improves the transient response at the (poten-
tial) cost of system instability. A standard rule of thumb
sets the crossover frequency P 1/10th of the switching
frequency. First, select the passive and active power
components that meet the application’s requirements.
Then, choose the small-signal compensation compo-
nents to achieve the desired closed-loop frequency
response and phase margin as outlined in the Closing
the Loop: Designing the Compensation Circuitry section.
Closing the Loop:
Designing the Compensation Circuitry
Select the desired crossover frequency. Choose fCO
approximately 1/10th of the switching frequency fSW, or
fCO ≈ 100kHz.
Select RC using the transfer-loop’s fourth asymptote
gain (assuming fCO > fP1, fP2, and fZ1 and setting the
overall loop gain to unity) as follows:
1=
V_FB
V_OUT
×
g_MV
×R_C
× G_MOD
× R_LOAD
×
1
2π × f_CO × C_OUT × (ESR + R_LOAD)
therefore:
R_C
=
V_OUT
V_FB
×
2π ×
f_CO ×
g_MV
C_OUT × (ESR + R_LOAD)
× G_MOD × R_LOAD
For RLOAD much greater than ESR, the equation can be
further simplified as follows:
R_C
=
V_OUT
V_FB
×
2π × f_CO × C_OUT
g_MV × G_MOD
where VFB is equal to 0.6V.
Determine CC by selecting the desired first system zero,
fZ1, based on the desired phase margin. Typically, set-
ting fZ1 below 1/5th of fCO provides sufficient phase
margin.
f_Z1 =
1
2π × C_CR_C
≤
f_CO
5
Therefore:
C_C
≥
2π
×
5
f_CO
×
R_C
IL
V_OUT
ISKIP-LIMIT
tON tOFF1
t_OFF2 = n x t_CK
ILOAD
VOUT-RIPPLE
Figure 3. Skip-Mode Waveforms
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