MAX1361 Datasheet, PDF (16/24 Pages) Maxim Integrated Products – 4-Channel, 10-Bit, System Monitors with Programmable Trip Window and SMBus Alert Response

4-Channel, 10-Bit, System Monitor with Programmable
Trip Window and SMBus Alert Response
Table 4. Setup-Byte Format*
BIT
7 (MSB)
6
NAME
Setup
REF/AIN SEL1
5
REF/AIN SEL0
4
INT REF Power
Down
3
INT/EXT Clock
2
UNI/BIP
1
Reset
0
Monitor Setup
*Power-on defaults: 0x82
DESCRIPTION
Setup byte always starts with 1.
When [0,0], REF/AIN3 = AIN3, REF = V_DD.
When [0,1], REF/AIN3 = REF, REF = external reference.
When [1,0], REF/AIN3 = AIN3, REF = internal reference.
When [1,1], REF/AIN3 = REF, REF = internal reference.
(Table 3)
1 = internal reference always powered up.
0 = internal reference always powered down.
(Table 3)
0 = internal clock.
1 = external clock (MAX1361/MAX1362 use the SCL clock for conversions).
0 = unipolar.
1 = bipolar.
Selects unipolar or bipolar conversion mode. In unipolar mode, analog signal in 0 to V_REF range can
be converted. In differential bipolar mode, input signal can range from -V_REF / 2 to +V_REF / 2. When
single-ended mode is chosen, the SE/DIF bit of configuration byte overrides UNI/BIP, and
conversions are performed in unipolar mode.
1 = no action.
0 = resets INT and configuration register. Setup register and channel trip thresholds are unaffected.
0 = no action.
1 = extends writing up to 13 bytes (104 bits) of alarm reset mask. Scans speed selection and alarm
thresholds. See the Configuring Monitor Mode section.
Table 5. Channel Selection in Single-
Ended Mode (SE/DIF = 1)
CS1
CS0
CH0
CH1
CH2
CH3
0
0
+
0
1
+
1
0
+
1
1
+
Table 6. Channel Selection in Differential
Mode (SE/DIF = 0)
CS1
CS0
CH0
CH1
CH2
CH3
0
0
+
-
0
1
-
+
1
0
+
-
1
1
-
+
Table 7. SE/DIF and UNI/BIP Table
SE/DIF
0
0
1
1
UNI/BIP
0
1
0
1
MODE
Differential inputs, unipolar
Differential inputs, bipolar
Single-ended inputs, unipolar
Single-ended inputs, unipolar
Reading a Conversion (Read Cycle)
Initiate a read cycle to start a conversion sequence and
to obtain conversion results. See the Scan Modes
section for details on the channel-scan sequence. Read
cycles begin with the bus master issuing a START
condition followed by 7 address bits and a read bit
(R/W = 1). After successfully receiving the address byte,
the MAX1361/MAX1362 (slave) issue an ACK. The master
then reads from the slave. (See Figures 10–13.)
The result is transmitted in 2 bytes. The 1st byte con-
sists of a leading 1 followed by a 2-bit binary channel
address tag, a 12/10 bit flag (0 for the MAX1361/
MAX1362), 2 bits of 1s, the first 2 bits of the data result,
and the expected ACK from the master. The 2nd byte
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