MAX1272 Datasheet, PDF (16/20 Pages) Maxim Integrated Products – Fault-Protected, 12-Bit ADCs with Software-Selectable Input Range

Fault-Protected, 12-Bit ADCs
with Software-Selectable Input Range
Table 5. Detailed SSPCON Register Contents—PIC16/PIC17
CONTROL BIT
WCOL
BIT7
X
SSPOV
BIT6
X
SSPEN
BIT5
1
CKP
BIT4
0
SSPM3
BIT3
0
SSPM2
BIT2
0
SSPM1
BIT1
0
SSPM0
BIT0
1
X = Don’t care.
SYNCHRONOUS SERIAL-PORT CONTROL REGISTER (SSPCON)
Write Collision Detection Bit
Receive Overflow Detection Bit
Synchronous Serial-Port Enable Bit:
0: Disables serial port and configures these pins as I/O port pins.
1: Enables serial port and configures SCK, SDO, and SCI pins as serial port pins.
Clock Polarity Select Bit. CKP = 0 for SPI master mode section.
Synchronous Serial-Port Mode-Select Bit. Sets SPI master mode and selects f_CLK = f_OSC / 16.
Table 6. Detailed SSPSTAT Register Contents—PIC16/PIC17
CONTROL BIT
SMP
BIT7
0
CKE
BIT6
1
D/A
BIT5
X
P
BIT4
X
S
BIT3
X
R/W
BIT2
X
UA
BIT1
X
BF
BIT0
X
X = Don’t care.
SYNCHRONOUS SERIAL-PORT STATUS REGISTER (SSPSTAT)
SPI Data Input Sample Phase. Input data is sampled at the middle of the data output
time.
SPI Clock Edge-Select Bit. Data is transmitted on the rising edge of the serial clock.
Data Address Bit
Stop Bit
Start Bit
Read/Write Bit Information
Update Address
Buffer Full Status Bit
OUTPUT CODE
1…111
1…110
1…101
1…100
1 LSB = ^FS
4096
OUTPUT CODE
(TWO’S COMPLEMENT)
0…111
0…110
0…101
0…100
1 LSB = ^{2FS}
4096
0…001
0…000
1…111
0…011
0…010
0…001
0…000
012 3
4092 4094 FS
INPUT VOLTAGE (LSB)
Figure 13a. Unipolar Transfer Function
1…011
1…010
1…001
1…000
-2048 -2046
-1 0 +1
INPUT VOLTAGE (LSB)
Figure 13b. Bipolar Transfer Function
+2045 +2047
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