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MAX1272 Datasheet, PDF (10/20 Pages) Maxim Integrated Products – Fault-Protected, 12-Bit ADCs with Software-Selectable Input Range
Fault-Protected, 12-Bit ADCs
with Software-Selectable Input Range
Table 2. Input Range and Polarity Selection for MAX1272
INPUT RANGE
0 to 5V
±5V
0 to 10V
±10V
RNG
BIP
0
0
0
1
1
0
1
1
NEGATIVE
FULL SCALE
—
-VREF × 1.2207
—
-VREF × 2.4414
ZERO SCALE
0
0
0
0
FULL SCALE
VREF × 1.2207
VREF × 1.2207
VREF × 2.4414
VREF × 2.4414
Table 3. Input Range and Polarity Selection for MAX1273
INPUT RANGE
0 to VREF / 2
±VREF / 2
0 to VREF
±VREF
RNG
BIP
0
0
0
1
1
0
1
1
NEGATIVE
FULL SCALE
—
-VREF / 2
—
-VREF
ZERO SCALE
0
0
0
0
FULL SCALE
VREF / 2
VREF / 2
VREF
VREF
Table 4. Power-Down Selection
PD
MODE1
MODE0
1
X
X
0
0
1
0
0
1
1
MODE
Normal operation (ADCs always active). Automatically enters delayed
standby power-down mode between conversions.
Delayed standby power-down mode.
Immediate standby power-down mode.
Delayed full power-down mode.
Immediate full power-down mode.
R1
AIN
BIPOLAR
S1
VOLTAGE
REFERENCE
R3
4.8kΩ
S2
UNIPOLAR
OFF
ON
CHOLD
R2
S3
TRACK
HOLD
TRACK
S4
T/H
OUT
HOLD
S1 = BIPOLAR/UNIPOLAR SWITCH
S2 = INPUT MUX SWITCH
S3, S4 = T/H SWITCH
R1 = 11.3kΩ (MAX1272)
or 4.8kΩ (MAX1273)
R2 = 7.8kΩ (MAX1272)
or ∞ (OPEN) (MAX1273)
Figure 3. Equivalent Input Circuit
Input Data Format
Input data (control byte) clocks in at DIN on the rising
edge of SCLK. CS enables communication with the
MAX1272/MAX1273. After CS falls, the first arriving 1
represents the start bit (MSB) of the input control byte.
The start bit is defined as follows:
1) The first high bit clocked into DIN with CS low any
time the converter is idle (e.g., after applying VDD).
2) The first high bit clocked into DIN after bit 4 (D4) of a
conversion in progress clocks out on DOUT.
See Table 1 for programming the control byte. Figure 4
shows the detailed serial interface timing.
Output Data Format
Output data (DOUT) clocks out MSB first on the falling
edge of SCLK. The unipolar mode provides a straight
binary output. The bipolar mode provides a two’s com-
plement binary output. For output binary codes, see the
Transfer Function section.
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