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DS1308 Datasheet, PDF (15/16 Pages) Dallas Semiconductor – 64 X 8 Serial Real Time Clock
DS1308
Low-Current I2C RTC with 56-Byte NV RAM
impractical, the following method should be used to
perform reads from a specified memory location.
Manipulating the Address Counter for Reads: A
dummy write cycle can be used to force the address
counter to a particular value. To do this the mas-
ter generates a START condition, writes the slave
address byte (R/W = 0), writes the memory address
where it desires to read, generates a repeated START
condition, writes the slave address byte (R/W = 1),
reads data with ACK or NACK as applicable, and
generates a STOP condition. See Figure 7 for a read
example using the repeated START condition to
specify the starting memory location.
Reading Multiple Bytes From a Slave: The read
operation can be used to read multiple bytes with a
single transfer. When reading bytes from the slave,
the master simply ACKs the data byte if it desires to
read another byte before terminating the transaction.
After the master reads the last byte it must NACK to
indicate the end of the transfer and then it generates
a STOP condition.
Bus Timeout
To avoid an unintended I2C interface timeout, SCL
should not be held low longer than tTIMEOUTMIN. The
I2C interface is in the reset state and can receive a
new START condition when SCL is held low for at least
tTIMEOUTMAX. When the part detects this condition, SDA
is released and allowed to float. For the timeout function to
work, the oscillator must be enabled and running.
Applications Information
Power-Supply Decoupling
To achieve the best results when using the DS1308,
decouple the VCC power supply with a 0.01FF and/or
0.1FF capacitor. Use a high-quality, ceramic, surface-
mount capacitor if possible. Surface-mount components
minimize lead inductance, which improves performance,
and ceramic capacitors tend to have adequate high-
frequency response for decoupling applications.
Using Open-Drain Outputs
The SQW/CLKIN output is open drain and therefore
requires an external pullup resistor to realize a logic-high
output level.
SDA and SCL Pullup Resistors
SDA is an open-drain output and requires an external
pullup resistor to realize a logic-high output level.
Because the DS1308 does not use clock cycle stretch-
ing, a master using either an open-drain output with a
pullup resistor or CMOS output driver (push-pull) could
be used for SCL.
Battery Charge Protection
The DS1308 contains Maxim’s redundant battery-charge
protection circuit to prevent any charging of an external
battery.
Handling, PCB Layout, and Assembly
Avoid running signal traces under the package, unless
a ground plane is placed between the package and the
signal line.
The lead(Pb)-free/RoHS package can be soldered using
a reflow profile that complies with JEDEC J-STD-020.
Moisture-sensitive packages are shipped from the fac-
tory dry-packed. Handling instructions listed on the pack-
age label must be followed to prevent damage during
reflow. Refer to the IPC/JEDEC J-STD-020 standard for
moisture-sensitive device (MSD) classifications.
Chip Information
PROCESS: CMOS
SUBSTRATE CONNECTED TO GROUND
Ordering Information
PART
DS1308U-18+*
DS1308U-3+*
DS1308U-33+
TEMP RANGE
-40NC to +85NC
-40NC to +85NC
-40NC to +85NC
PIN-PACKAGE
8 FSOP
8 FSOP
8 FSOP
+Denotes a lead(Pb)-free/RoHS-compliant package.
*Future product—contact factory for availability.
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maxim-ic.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
8 µSOP
PACKAGE
CODE
U8+1
OUTLINE
NO.
21-0036
LAND
PATTERN NO.
90-0092
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