MAX11612_11 Datasheet, PDF (14/22 Pages) Maxim Integrated Products – Low-Power, 4-/8-/12-Channel, I2C, 12-Bit ADCs in Ultra-Small Packages

Low-Power, 4-/8-/12-Channel, I²C,
12-Bit ADCs in Ultra-Small Packages
Table 2. Configuration Byte Format
BIT 7
(MSB)
REG
BIT 6
SCAN1
BIT 5
SCAN0
BIT 4
CS3
BIT 3
CS2
BIT 2
CS1
BIT 1
CS0
BIT 0
(LSB)
SGL/DIF
BIT
NAME
DESCRIPTION
7
REG
Register bit. 1 = setup byte (see Table 1), 0 = configuration byte.
6
SCAN1
Scan select bits. Two bits select the scanning configuration (Table 5). Default to 00 at power-up.
5
SCAN0
4
CS3
3
CS2
Channel select bits. Four bits select which analog input channels are to be used for conversion
(Tables 3 and 4). Default to 0000 at power-up. For the MAX11612/MAX11613, CS3 and CS2 are
2
CS1
internally set to 0. For the MAX11614/MAX11615, CS3 is internally set to 0.
1
CS0
0
SGL/DIF ^{1 = single-ended, 0 = differential (Tables 3 and 4). Defaults to 1 at power-up. See the Single-}
Ended/Differential Input section.
Table 3. Channel Selection in Single-Ended Mode (SGL/DIF = 1)
CS3¹ CS2¹ CS1 CS0 AIN0 AIN1 AIN2 AIN3² AIN4 AIN5 AIN6 AIN7 AIN8 AIN9 AIN10 AIN11² GND
0
0
0
0
+
-
0
0
0
1
+
-
0
0
1
0
+
-
0
0
1
1
+
-
0
1
0
0
+
-
0
1
0
1
+
-
0
1
1
0
+
-
0
1
1
1
+
-
1
0
0
0
+
-
1
0
0
1
+
-
1
0
1
0
+
-
1
0
1
1
+
-
1
1
0
0
RESERVED
1
1
0
1
RESERVED
1
1
1
0
RESERVED
1
1
1
1
RESERVED
1_{For the MAX11612/MAX11613, CS3 and CS2 are internally set to 0. For the MAX11614/MAX11615, CS3 is internally set to 0.}
2_{When SEL1 = 1, a single-ended read of AIN3/REF (MAX11612/MAX11613) or AIN11/REF (MAX11616/MAX11617) is ignored; scan}
stops at AIN2 or AIN10. This does not apply to the MAX11614/MAX11615 as each provides separate pins for AIN7 and REF.
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