MAX15026_12 Datasheet, PDF (12/23 Pages) Maxim Integrated Products – Low-Cost, Small, 4.5V to 28V Wide Operating Range, DC-DC Synchronous Buck Controller

Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
Sink current limit is implemented by monitoring the volt-
age drop across the low-side MOSFET when LX is more
positive than GND. When the voltage drop across the
low-side MOSFET exceeds 1/20th of the voltage at LIM
at any time during the low-side MOSFET on-time, the
low-side MOSFET turns off, and the inductor current
flows from the output through the body diode of the high-
side MOSFET. When the sink current limit activates, the
DH/DL switching sequence is no longer complementary.
Carefully observe the PCB layout guidelines to ensure
that noise and DC errors do not corrupt the current-
sense signals at LX and GND. Mount the MAX15026
close to the low-side MOSFET with short, direct traces
making a Kelvin-sense connection so that trace resis-
tance does not add to the intended sense resistance of
the low-side MOSFET.
Hiccup-Mode Overcurrent Protection
Hiccup-mode overcurrent protection reduces power dis-
sipation during prolonged short-circuit or deep overload
conditions. An internal three-bit counter counts up on
each switching cycle when the valley current-limit
threshold is reached. The counter counts down on each
switching cycle when the threshold is not reached, and
stops at zero (000). The counter reaches 111 (= 7
events) when the valley mode current-limit condition
persists. The MAX15026 stops both DL and DH drivers
and waits for 4096 switching cycles (hiccup timeout
delay) before attempting a new soft-start sequence. The
hiccup-mode protection remains active during the soft-
start time.
Undervoltage Lockout
The MAX15026 provides an internal undervoltage lockout
(UVLO) circuit to monitor the voltage on V_CC. The UVLO
circuit prevents the MAX15026 from operating when V_CC
is lower than V_UVLO. The UVLO threshold is 4V, with
400mV hysteresis to prevent chattering on the rising/falling
edge of the supply voltage. DL and DH stay low to inhibit
switching when the device is in undervoltage lockout.
Thermal-Overload Protection
Thermal-overload protection limits total power dissipation
in the MAX15026. When the junction temperature of the
device exceeds +150°C, an on-chip thermal sensor shuts
down the device, forcing DL and DH low, allowing the
device to cool. The thermal sensor turns the device on
again after the junction temperature cools by 20°C. The
regulator shuts down and soft-start resets during thermal
shutdown. Power dissipation in the LDO regulator and
excessive driving losses at DH/DL trigger thermal-over-
load protection. Carefully evaluate the total power dissi-
pation (see the Power Dissipation section) to avoid
unwanted triggering of the thermal-overload protection in
normal operation.
Applications Information
Effective Input Voltage Range
The MAX15026 operates from input supplies up to 28V
and regulates down to 0.6V. The minimum voltage con-
version ratio (V_OUT/V_IN) is limited by the minimum con-
trollable on-time. For proper fixed-frequency PWM
operation, the voltage conversion ratio must obey the
following condition,
V_OUT
V_IN
>
t_ON(MIN)
× f_SW
where t_ON(MIN) is 125ns and f_SW is the switching fre-
quency in Hertz. Pulse-skipping occurs to decrease the
effective duty cycle when the desired voltage conver-
sion does not meet the above condition. Decrease the
switching frequency or lower V_IN to avoid pulse skipping.
The maximum voltage conversion ratio is limited by the
maximum duty cycle (D_max):
V_OUT
V_IN
< D_max
− ^Dmax
× V_DROP2
+ (1− D_max) × V_DROP1
V_IN
where V_DROP1 is the sum of the parasitic voltage drops
in the inductor discharge path, including synchronous
rectifier, inductor, and PCB resistance. V_DROP2 is the
sum of the resistance in the charging path, including
high-side switch, inductor, and PCB resistance. In
practice, provide adequate margin to the above condi-
tions for good load-transient response.
Setting the Output Voltage
Set the MAX15026 output voltage by connecting a
resistive divider from the output to FB to GND (Figure
2). Select R₂ from between 1kΩ and 50kΩ. Calculate
R₁ with the following equation:
R₁
=
R₂
⎡⎛
⎣⎢⎢⎝⎜
V_OUT
V_FB
⎞
⎠⎟
−
⎤
1_⎥
⎦⎥
where V_FB = 0.591V (see the Electrical Characteristics
table) and V_OUT can range from 0.591V to (0.85 x V_IN).
Resistor R₁ also plays a role in the design of the Type III
compensation network. Review the values of R₁ and R₂
when using a Type III compensation network (see the
Type III Compensation Network (See Figure 4) section).
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