MAX1167BE Datasheet, PDF (12/30 Pages) Maxim Integrated Products – Multichannel, 16-Bit, 200ksps Analog-to-Digital Converters

Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
REFCAP
AV_DD
DV_DD
REF
AGND
AIN0
AIN1
AIN2
AIN3
SCLK
CS
REFERENCE
BUFFER
MAX1167
ANALOG-INPUT
MULTIPLEXER
DAC
COMPARATOR
AZ
RAIL
BIAS
ANALOG-SWITCH FINE TIMING
OSCILLATOR
MULTIPLEXER
SUCCESSIVE-APPROXIMATION
REGISTER
OUTPUT
CONTROL
ACCUMULATOR
MEMORY
DOUT
EOC
DIN
INPUT REGISTER
AGND
DGND
Figure 3. MAX1167 Functional Diagram
Track/Hold (T/H)
In track mode, the analog signal is acquired on the
internal hold capacitor. In hold mode, the T/H switches
open and the capacitive digital-to-analog converter
(DAC) samples the analog input.
During the acquisition, the analog input (AIN_) charges
capacitor C_DAC. At the end of the acquisition interval
the T/H switches open. The retained charge on C_DAC
represents a sample of the input.
In hold mode, the capacitive DAC adjusts during the
remainder of the conversion cycle to restore node
ZERO to zero within the limits of 16-bit resolution. At the
end of the conversion, force CS high and then low to
reset the T/H switches back to track mode (AIN_),
where C_DAC charges to the input signal again.
The time required for the T/H to acquire an input signal
is a function of how quickly its input capacitance is
charged. If the input signal’s source impedance is high,
the acquisition time lengthens and more time must be
allowed between conversions. The acquisition time
(t_ACQ) is the maximum time the device takes to acquire
the signal. Use the following formula to calculate acqui-
sition time:
t_ACQ = 11(R_S + R_IN + R_DS(ON)) ✕ 45pF + 0.3µs
where R_IN = 340Ω, R_S = the input signal’s source
impedance, R_DS(ON) = 60Ω, and t_ACQ is never less
than 729ns. A source impedance of less than 200Ω
does not significantly affect the ADC’s performance.
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