MAX11646 Datasheet, PDF (12/20 Pages) Maxim Integrated Products – 2.7V to 3.6V and 4.5V to 5.5V, Low-Power, 1-/2-Channel, 2-Wire Serial, 10-Bit ADCs

2.7V to 3.6V and 4.5V to 5.5V, Low-Power,
1-/2-Channel, 2-Wire Serial, 10-Bit ADCs
DEVICE
MAX11646/MAX11647
SLAVE ADDRESS
0110110
SLAVE ADDRESS
S
0
1
1
0
1
1
0
R/W
A
SDA
SCL
1
2
3
4
5
6
7
8
9
Figure 7. Slave Address Byte
Slave Address
A bus master initiates communication with a slave device
by issuing a START condition followed by a slave
address. When idle, the MAX11646/MAX11647 continu-
ously wait for a START condition followed by their slave
address. When the MAX11646/MAX11647 recognize their
slave address, they are ready to accept or send data.
The slave address has been factory programmed and is
always 0110110 for the MAX11646/MAX11647 (Figure 7).
The least significant bit (LSB) of the address byte (R/W)
determines whether the master is writing to or reading
from the MAX11646/MAX11647 (R/W = 0 selects a write
condition, R/W = 1 selects a read condition). After receiv-
ing the address, the MAX11646/MAX11647 (slave) issue
an acknowledge by pulling SDA low for one clock cycle.
Bus Timing
At power-up, the MAX11646/MAX11647 bus timing is set
for fast mode (F/S mode), allowing conversion rates up to
22.2ksps. The MAX11646/MAX11647 must operate in
high-speed mode (HS mode) to achieve conversion
rates up to 94.4ksps. Figure 1 shows the bus timing for
the MAX11646/MAX11647’s 2-wire interface.
HS Mode
At power-up, the MAX11646/MAX11647 bus timing is
set for F/S mode. The bus master selects HS mode by
addressing all devices on the bus with the HS-mode
master code 0000 1XXX (X = don’t care). After suc-
cessfully receiving the HS-mode master code, the
MAX11646/MAX11647 issue a not-acknowledge, allow-
ing SDA to be pulled high for one clock cycle
(Figure 8). After the not-acknowledge, the MAX11646/
MAX11647 are in HS mode. The bus master must then
send a repeated START followed by a slave address to
initiate HS-mode communication. If the master gener-
ates a STOP condition the MAX11646/MAX11647 return
to F/S mode.
HS-MODE MASTER CODE
S
0
0
0
0
1
X
X
X
A
Sr
SDA
SCL
F/S MODE
HS MODE
Figure 8. F/S-Mode to HS-Mode Transfer
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