MAX11335 Datasheet, PDF (12/37 Pages) Maxim Integrated Products – 500ksps, 12-/10-Bit, 4-/8-/16-Channel ADCs

MAX11335–MAX11340
500ksps, 12-/10-Bit, 4-/8-/16-Channel ADCs with
Post-Mux External Signal Conditioning Access
Pin Description
MAX11335
MAX11338
(4 CHANNEL)
1–10, 17, 19
11
12
13
14
15
16
MAX11336
MAX11337
MAX11339
MAX11340
(8 CHANNEL) (16 CHANNEL)
5–10, 17, 19
17, 19
11
11
12
12
13
13
14
14
15
—
16
—
18
18
18
20, 21
22
20, 21
22
20, 21
22
23
23
23
24
24
24
25
25
25
26
26
26
27
27
27
28
28
28
NAME
FUNCTION
GND
AOP
AON
AIP
AIN
CNVST
REF-
REF+
V_DD
SCLK
CS
DIN
DGND
OVDD
DOUT
EOC
Ground
Positive Output from the Multiplexer
Negative Output from the Multiplexer
Positive Input to the ADC
Negative Input to the ADC
Active-Low Conversion Start Input
External Differential Reference Negative Input
External Positive Reference Input. Apply a reference voltage at
REF+. Bypass to GND with a 0.47FF capacitor.
Power-Supply Input. Bypass to GND with a 10FF in parallel with
a 0.1FF capacitors.
Serial Clock Input. Clocks data in and out of the serial interface.
Active-Low Chip Select Input. When CS is low, the serial
interface is enabled. When CS is high, DOUT is high
impedance or three-state.
Serial Data Input. DIN data is latched into the serial interface on
the rising edge of SCLK.
Digital I/O Ground
Digital Power-Supply Input. Bypass to GND with a 10FF in
parallel with a 0.1FF capacitors.
Serial Data Output. Data is clocked out on the falling edge of
SCLK. When CS is high, DOUT is high impedance or three-
state.
End of Conversion Output. Data is valid after EOC is driven low
(internal clock mode only).
29–32
—
—
AIN0–AIN3 Analog Inputs
—
—
15
CNVST/
AIN14
Active-Low Conversion Start Input/Analog Input 14
—
—
16
REF-/AIN15 External Differential Reference Negative Input /Analog Input 15
—
—
29–32 , 1–10 AIN0–AIN13 Analog Inputs
—
29–32, 1–4
—
AIN0–AIN7 Analog Inputs
—
—
—
EP
Exposed Pad. Connect EP directly to GND plane for
guaranteed performance.
Maxim Integrated
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