MAX106 Datasheet, PDF (12/32 Pages) Maxim Integrated Products – ±5V, 600Msps, 8-Bit ADC with On-Chip 2.2GHz Bandwidth Track/Hold Amplifier

±5V, 600Msps, 8-Bit ADC with On-Chip
2.2GHz Bandwidth Track/Hold Amplifier
BANDGAP
REFERENCE
REF REF
OUT IN
+2.5V
REFERENCE
AMPLIFIER
VOSADJ
GNDI
50Ω
VIN+
VIN-
50Ω
GNDR
BIAS CURRENTS
T/H AMPLIFIER
CLK+
CLKCOM
CLK-
GNDI
50Ω
50Ω
T/H
CLOCK
DRIVER
ADC
CLOCK
DRIVER
RSTIN+
RSTIN-
RESET INPUT
DUAL LATCH
Figure 1. Simplified Functional Diagram
MAX106
8-BIT
2
FLASH ADC
16
LOGIC
CLOCK
DRIVER
DIFFERENTIAL
PECL OUTPUTS
OVERRANGE
OR
BIT
2
AUXILIARY
DATA PORT
16
A0–A7
PRIMARY
P0–P7
DATA PORT
16
DATA
READY CLOCK ₂
DREADY
DEMUX
CLOCK
DRIVER
RESET
PIPELINE
DELAYED
RESET
DEMUX
CLOCK
GENERATOR
DEMUXEN DIVSELECT
DEMUX
RESET OUTPUT ₂
RSTOUT
Detailed Description
The MAX106 is an 8-bit, 600Msps flash ADC with on-
chip T/H amplifier and differential PECL-compatible
outputs. The ADC (Figure 1) employs a fully differential
8-bit quantizer and a unique encoding scheme to limit
metastable states to typically one error per 10²⁷ clock
cycles, with no error exceeding 1LSB max.
An integrated 8:16 output demultiplexer simplifies inter-
facing to the part by reducing the output data rate to
one-half the sampling clock rate. This demultiplexer
has internal reset capability that allows multiple
MAX106s to be time-interleaved to achieve higher
effective sampling rates.
When clocked at 600Msps, the MAX106 provides a typ-
ical effective number of bits (ENOB) of 7.6 bits at an
analog input frequency of 300MHz. The analog input of
the MAX106 is designed for differential or single-ended
use with a ±250mV full-scale input range. In addition,
this fast ADC features an on-board +2.5V precision
bandgap reference. If desired, an external reference
can also be used.
12 ______________________________________________________________________________________