DG411F Datasheet, PDF (12/16 Pages) Maxim Integrated Products – Quad, Rail-to-Rail, Fault-Protected, SPST Analog Switches

Quad, Rail-to-Rail, Fault-Protected,
SPST Analog Switches
Test Circuits/Timing Diagrams (continued)
V+
V_{IN_}
IN_
V+ _{NO_}
10V
IN_
NC_
3V
V_{IN_}
0V
DG413F ^COM_
COM_
GND V-
R_L
V-
V_OUT ^{VNO_, VNC_}
C_L
V_OUT
0V
V- IS CONNECTED TO GND (0V) FOR SINGLE-SUPPLY OPERATION.
Figure 3. DG413F Break-Before-Make Interval
t_F < 5ns
t_R < 5ns
50%
90%
t_BBM
V+
V_{IN_}
R_GEN
IN_ ^V+ NO_ OR NC_
DG411F
DG412F
DG413F COM_
GND V-
V-
V_GEN
V_OUT
C_L
V- IS CONNECTED TO GND (0V) FOR SINGLE-SUPPLY OPERATION.
Figure 4. Charge Injection
3V
V_{IN_}
0V
V_OUT
∆V_OUT
∆V_OUT IS THE MEASURED VOLTAGE DUE TO CHARGE-
TRANSFER ERROR Q WHEN THE CHANNEL TURNS OFF
Q = ∆V_OUT x C_L
V+
V+ _{NO_}
V+
DG411F ^NC_
IN_ ^DG412F
DG413F _{COM_}
GND V-
1MHz
CAPACITANCE
ANALYZER
V-
V- IS CONNECTED TO GND (0V) FOR SINGLE-SUPPLY OPERATION.
Figure 5. COM_, NO_, NC_ Capacitance
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