DS1347_13 Datasheet, PDF (10/17 Pages) Maxim Integrated Products – Low-Current, SPI-Compatible Real-Time Clock

DS1347
Low-Current, SPI-Compatible
Real-Time Clock
Reading the Clock
Reading the Timekeeping Registers
The main timekeeping registers (Seconds, Minutes,
Hours, Date, Month, Day, Year) can be read with either
single reads or a burst read. In the device, a latch
buffers each clock counter’s data. Clock counter data
is latched by the SPI read command (on the falling
edge of SCLK, after the address/command byte has
been sent by the master to read a timekeeping regis-
ter). Collision-detection circuitry ensures that this does
not happen coincident with a Seconds counter incre-
ment to ensure accurate time data is read. The clock
counters continue to count and keep accurate time dur-
ing the read operation.
The simplest way to read the timekeeping registers is to
use a burst read. In a burst read, the main timekeeping
registers (Seconds, Minutes, Hours, Date, Month, Day,
Year), and the Control register are read sequentially, in
the order listed with the Seconds register first. They are
read out as a group of eight registers, with 8 bits each.
All timekeeping registers (except Century) are latched
upon the receipt of the burst read command. The
worst-case error between the “actual” time and the
“read” time is 1s for a normal data transfer.
The timekeeping registers can also be read using sin-
gle reads. If single reads are used, it is necessary to do
some error checking on the receiving end, because it is
possible that the clock counters could change during
the read operations, and report inaccurate time data.
The potential for error is when the Seconds register
increments before all the registers are read. For exam-
ple, suppose a carry of 13:59:59 to 14:00:00 occurs
during single read operations. The net data read could
be 14:59:59, which is erroneous. To prevent errors from
occurring with single read operations, read the
Seconds register first (initial-seconds) and store this
value for future comparison. After the remaining time-
keeping registers have been read, reread the Seconds
register (final-seconds). Check that the final-seconds
value equals the initial-seconds value. If not, repeat the
entire single read process. Using single reads at a
100kHz serial speed, it takes under 2.5ms to read all
seven of the timekeeping registers, including two reads
of the Seconds register.
Example: Reading the Clock
with a Burst Read
To read the time with a burst read, send BFh as the
Address/Command byte. Then clock out 8 bytes,
Seconds, Minutes, Hours, Date of the month, Month,
Day of the week, Year, and finally the Control byte. All
data is output MSB first. Decode the required informa-
tion based on the register definitions listed in Table 1.
Using the Alarm
A polled alarm function is available by reading the ALM
OUT bit. The ALM OUT bit is D7 of the Minutes time-
keeping register. A logic 1 in ALM OUT indicates the
Alarm function is triggered. There are eight registers
associated with the alarm function—seven programma-
ble alarm threshold registers and one programmable
Alarm Configuration register. The Alarm Configuration
register determines which alarm threshold registers are
compared to the timekeeping registers, and the ALM
OUT bit sets if the compared registers are equal. Table
1 shows the function of each bit of the Alarm
Configuration register. Placing a logic 1 in any given bit
of the Alarm Configuration register enables the respec-
tive alarm function. For example, if the Alarm
Configuration register is set to 0000 0011, ALM OUT is
set when both the minutes and seconds indicated in
the alarm threshold registers match the respective
timekeeping registers. Once set, ALM OUT stays high
until it is cleared by reading or writing to the Alarm
Configuration register, or by reading or writing to any of
the alarm threshold registers. The Alarm Configuration
register is located at address 15h, and is initialized to
00h on the first application of power.
Using the On-Board RAM
The static RAM is 31 x 8 bits addressed consecutively
in the RAM Address/Command space. Table 1 details
the specific hex address/commands for reads and
writes to each of the 31 locations of RAM. The contents
of the RAM are static and remain valid for V_CC down to
2V. All RAM data is lost if power is cycled. The write-
protect bit (WP in the Control register), when high, dis-
allows any writes to RAM. The RAM’s power-on state is
undefined.
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