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28529-DSH-001-K_15 Datasheet, PDF (275/309 Pages) M/A-COM Technology Solutions, Inc. – Inverse Multiplexing for ATM (IMA) Family
Product Specification
Figure 3-18. PHY-side Interleaved Highway Mode Transmit Timing (IHTxClkPolx = 0, IHTxDatShftx = 1)
IH T xC lk
IH TxS ync
IH TxInD o
IH TxD ata
tpwh
tper
tpwl
ts
th
ts
th
ts
th
ts
th
tpd
Figure 3-19. PHY-side Interleaved Highway Mode Transmit Timing (IHTxClkPolx = 1, IHTxDatShftx = 1)
IH T xC lk
IH T xS ync
IH T xIn D o
IH T xD ata
tpw l
tper
tpw h
ts
th
ts
th
ts
th
ts
th
tpd
Table 3-15. PHY-side Interleaved Highway Mode Transmit Timing Parameters
Symbol
Parameter
Minimum
Typical
tper
IH transmit clock period
50
tpwh
IH transmit clock pulse width (high)
20
tpwl
IH transmit clock pulse width (low)
20
ts
Setup to ihtxclk rise(fall)(1) edge
5
th
Hold from ihtxclk rise(fall)(1) edge
3
tpd
Delay from ihtxclk rise(fall)(1) edge
2
Footnote:
(1) Timing synchronized to falling clock edge when IHTxClkPolx = 1
General Note:
1. All outputs are assumed to have 20 pF loading.
Maximum
20
Units
ns
ns
ns
ns
ns
ns
28529-DSH-001-K
Mindspeed Technologies®
260
Mindspeed Proprietary and Confidential