LTC3407A-2 Datasheet, PDF (9/16 Pages) Linear Technology – Dual Synchronous 800mA,2.25MHz Step-Down DC/DC Regulator

LTC3407A-2
APPLICATIO S I FOR ATIO
Output Capacitor (C_OUT) Selection
The selection of C_OUT is driven by the required ESR to
minimize voltage ripple and load step transients. Typically,
once the ESR requirement is satisfied, the capacitance is
adequate for filtering. The output ripple (ΔV_OUT) is deter-
mined by:
ΔV_OUT
≈
ΔI_L
⎛⎝⎜ _ESR
+
8f_O
1
C_OUT
⎞
⎠⎟
where f_O = operating frequency, C_OUT = output capacitance
and ΔI_L = ripple current in the inductor. The output ripple
is highest at maximum input voltage since ΔI_L increases
with input voltage. With ΔI_L = 0.3 • I_LIM the output ripple
will be less than 100mV at maximum V_IN and f_O = 2.25MHz
with:
ESR_COUT < 150mΩ
Once the ESR requirements for C_OUT have been met, the
RMS current rating generally far exceeds the I_RIPPLE(P-P)
requirement, except for an all ceramic solution.
In surface mount applications, multiple capacitors may
have to be paralleled to meet the capacitance, ESR or RMS
current handling requirement of the application. Alumi-
num electrolytic, special polymer, ceramic and dry tantulum
capacitors are all available in surface mount packages. The
OS-CON semiconductor dielectric capacitor available from
Sanyo has the lowest ESR(size) product of any aluminum
electrolytic at a somewhat higher price. Special polymer
capacitors, such as Sanyo POSCAP, offer very low ESR,
but have a lower capacitance density than other types.
Tantalum capacitors have the highest capacitance density.
However, they also have a larger ESR and it is critical that
they are surge tested for use in switching power supplies.
An excellent choice is the AVX TPS series of surface mount
tantalums, available in case heights ranging from 2mm to
4mm. Aluminum electrolytic capacitors have a signifi-
cantly larger ESR, and are often used in extremely cost-
sensitive applications provided that consideration is given
to ripple current ratings and long term reliability. Ceramic
capacitors have the lowest ESR and cost, but also have the
lowest capacitance density, a high voltage and tempera-
ture coefficient, and exhibit audible piezoelectric effects.
In addition, the high Q of ceramic capacitors along with
trace inductance can lead to significant ringing. Other
capacitor types include the Panasonic Special Polymer
(SP) capacitors.
In most cases, 0.1μF to 1μF of ceramic capacitors should
also be placed close to the LTC3407A-2 in parallel with the
main capacitors for high frequency decoupling.
V_IN = 2.5V TO 5.5V
R6
V_OUT2
C_IN
BURST*
V_IN
MODE/SYNC
POR
PULSESKIP*
LTC3407A-2
RUN/SS2 RUN/SS1
L2
SW2
SW1
C2
C4
R4
C_OUT2
R3
V_FB2
GND
V_FB1
R7
POWER-ON
RESET
L1
C1
R2
R1
R5
V_OUT1
C3
C_OUT1
*MODE/SYNC = 0V: PULSE SKIP
MODE/SYNC = V_IN: Burst Mode
3407A2 F01
Figure 1. LTC3407A-2 General Schematic
Ceramic Input and Output Capacitors
Higher value, lower cost ceramic capacitors are now
becoming available in smaller case sizes. These are tempt-
ing for switching regulator use because of their very low
ESR. Unfortunately, the ESR is so low that it can cause
loop stability problems. Solid tantalum capacitor ESR
generates a loop “zero” at 5kHz to 50kHz that is instrumen-
tal in giving acceptable loop phase margin. Ceramic ca-
pacitors remain capacitive to beyond 300kHz and usually
resonate with their ESL before ESR becomes effective.
Also, ceramic caps are prone to temperature effects which
requires the designer to check loop stability over the
operating temperature range. To minimize their large
temperature and voltage coefficients, only X5R or X7R
ceramic capacitors should be used. A good selection of
ceramic capacitors is available from Taiyo Yuden, TDK,
and Murata.
Great care must be taken when using only ceramic input
and output capacitors. When a ceramic capacitor is used
at the input and the power is being supplied through long
wires, such as from a wall adapter, a load step at the output
can induce ringing at the V_IN pin. At best, this ringing can
couple to the output and be mistaken as loop instability.
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