LTC3828_15 Datasheet, PDF (8/32 Pages) Linear Technology – Dual, 2-Phase Step-Down Controller with Tracking

LTC3828
PIN FUNCTIONS (SSOP/QFN)
SGND (Pin 9/Pin 6): Small-Signal Ground. Common to
both controllers, this pin must be routed separately from
high current grounds to the common (–) terminals of the
C_OUT capacitors.
TRCKSS2, TRCKSS1 (Pins 10, 1/Pins 7, 29): Soft-Start
and Output Voltage Tracking Inputs. When one channel is
configured to be the master of two outputs a capacitor to
ground at this pin sets the ramp rate. The slave channel
tracks the output of the master channel by reproducing the
V_FB voltage of the master channel with a resistor divider
and applying that voltage to its track pin. An internal 1.2μA
soft-start current is always charging these pins.
SENSE2^–, SENSE1^– (Pins 11, 4/Pins 10, 32): The (–)
Input to the Differential Current Comparators.
SENSE2⁺, SENSE1⁺ (Pins 12, 3/Pins 11, 31): The (+)
Input to the Differential Current Comparators. The I_TH pin
voltage and controlled offsets between the SENSE^– and
SENSE⁺ pins in conjunction with R_SENSE set the current
trip threshold.
RUN2, RUN1 (Pins 15, 7/Pins 14, 3): Run Control Inputs.
Forcing RUN pins below 1V would shut down the circuitry
required for that particular channel. Forcing the RUN pins
over 2V would turn on the IC.
BOOST2, BOOST1 (Pins 16, 26/Pins 15, 26): Bootstrapped
Supplies to the Topside Floating Drivers. Capacitors
are connected between the boost and switch pins and
Schottky diodes are tied between the boost and INTV_CC
pins. Voltage swing at the boost pins is from INTV_CC to
(V_IN + INTV_CC).
TG2, TG1 (Pins 17, 25/Pins 16, 25): High Current Gate
Drives for Top N-Channel MOSFETs. These are the outputs
of floating drivers with a voltage swing equal to INTV_CC
– 0.5V superimposed on the switch node voltage SW.
SW2, SW1 (Pins 18, 24/Pins 17, 24): Switch Node
Connections to Inductors. Voltage swing at these pins
is from a Schottky diode (external) voltage drop below
ground to V_IN.
BG2, BG1 (Pins 19, 20/Pins 18, 19): High Current Gate
Drives for Bottom (Synchronous) N-Channel MOSFETs.
Voltage swing at these pins is from ground to INTV_CC.
PGND (Pin 21/Pin 20): Driver Power Ground. Connects to
the sources of bottom (synchronous) N-channel MOSFETs,
anodes of the Schottky rectifiers and the (–) terminal(s)
of C_IN.
DRV_CC (Pin 21 QFN Only): External Power Input to Gate
Drives. It can be connected with INTV_CC together and use
INTV_CC as gate drives power supply.
INTV_CC (Pin 22/Pin 22): Output of the Internal 5V Linear
Low Dropout Regulator. The driver and control circuits are
powered from this voltage source. Must be decoupled to
power ground with a minimum of 4.7μF tantalum or other
low ESR capacitor.
V_IN (Pin 23/Pin 23): Main Supply Pin. A bypass capaci-
tor should be tied between this pin and the signal ground
pin.
PGOOD (Pin 27/Pin 27): Open-Drain Logic Output. PGOOD
is pulled to ground when the voltage on either V_OSENSE
pin is not within ±7.5% of its set point.
CLKOUT (Pin 28/Pin 28): Output clock signal available to
daisy-chain other controller ICs for additional MOSFET
driver stages/phases.
NC (Pins 8, 9 QFN Only): These “no connect” pins are
not tied internally to anything. On the PC layout, these pin
landings should be connected to the SGND plane under
the IC.
Exposed Pad (Pin 33, QFN Only): Signal Ground. Must
be soldered to the PCB, providing a local ground for the
control components of the IC, and be tied to the PGND
pin under the IC.
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