LTC3828_15 Datasheet, PDF (20/32 Pages) Linear Technology – Dual, 2-Phase Step-Down Controller with Tracking

LTC3828
APPLICATIONS INFORMATION
up. The LTC3828 has the ability to either soft-start by
itself with an external soft-start capacitor or tracking the
output of the other channel or supply. When the device
is configured to soft-start by itself, an external soft-start
capacitor should be connected to the TRCKSS pin. A soft-
start current of 1.2μA is to charge the soft-start capacitor
C_SS. Note that soft-start during this mode is achieved not
by limiting the maximum output current of the controller
but by controlling the ramp rate of the output voltage.
As a matter of fact, current foldback is defeated during
soft-start or tracking. During this phase, the LTC3828 is
basically ramping the reference voltage until this voltage
is 7.5% below the 0.8V reference. The total soft-start time
can be estimated as:
t_SOFT-START = 0.925 • 0.8V • C_SS/1.2μA
The LTC3828 is designed such that the TRCKSS pin is not
actively pulled down if only one of the channels is shut
down. In this case, the TRCKSS pin voltage could be higher
than 0.8V. If this particular channel is powered up again,
the soft-start for this particular channel is provided by an
internal soft-start timer about 450μs. The internal soft-start
timer will also be in effect if the LTC3828 is trying to track
an output supply that is already powered up.
In any case, the force continuous mode is disabled and
PGOOD signal is forced low during the first 90% of the
soft-start phase. This time can be estimated for external
soft-start as:
t_FORCE = 0.9 • 0.925 • 0.8V • C_SS/1.2μA
For internal soft-start, it will be 450μs.
Fault Conditions: Current Limit and Current Foldback
The current comparators have a maximum sense volt-
age of 75mV resulting in a maximum MOSFET current
of 75mV/R_SENSE. The maximum value of current limit
generally occurs with the largest V_IN at the highest ambi-
ent temperature, conditions that cause the highest power
dissipation in the top MOSFET.
Each controller includes current foldback to help further
limit load current when the output is shorted to ground. If
the output falls below 70% of its nominal output level, then
the maximum sense voltage is progressively lowered from
75mV to 25mV. Under short-circuit conditions with very
20
low duty cycles, the controller will begin cycle skipping
in order to limit the short-circuit current. In this situation
the bottom MOSFET will be dissipating most of the power
but less than in normal operation. The short-circuit ripple
current is determined by the minimum on-time, t_ON(MIN),
of each controller (typically 200ns), the input voltage and
inductor value:
ΔI_L(SC) = t_ON(MIN) (V_IN/L)
The resulting short-circuit current is:
I_SC
=
25mV
R_SENSE
–
1
2
ΔI_L(SC)
Fault Conditions: Overvoltage Protection (Crowbar)
The overvoltage crowbar is designed to blow a system
input fuse when the output voltage of the regulator rises
much higher than nominal levels. The crowbar causes huge
currents to flow, that blow the fuse to protect against a
shorted top MOSFET if the short occurs while the control-
ler is operating.
A comparator monitors the output for overvoltage con-
ditions. The comparator (OV) detects overvoltage faults
greater than 7.5% above the nominal output voltage. When
this condition is sensed, the top MOSFET is turned off and
the bottom MOSFET is turned on until the overvoltage
condition is cleared. The output of this comparator is
only latched by the overvoltage condition itself and will
therefore allow a switching regulator system having a poor
PC layout to function while the design is being debugged.
The bottom MOSFET remains on continuously for as long
as the OV condition persists; if V_OUT returns to a safe level,
normal operation automatically resumes. A shorted top
MOSFET will result in a high current condition which will
open the system fuse. The switching regulator will regulate
properly with a leaky top MOSFET by altering the duty
cycle to accommodate the leakage.
Phase-Locked Loop and Frequency Synchronization
The IC has a phase-locked loop comprised of an internal
voltage controlled oscillator and phase detector. This al-
lows the top MOSFET turn-on to be locked to the rising
edge of an external source. The frequency range of the
voltage controlled oscillator is ±50% around the center
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