LTC3828_15 Datasheet, PDF (3/32 Pages) Linear Technology – Dual, 2-Phase Step-Down Controller with Tracking

LTC3828
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T_A = 25°C. V_IN = 15V, V_{RUN1, 2} = 5V unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
Main Control Loops
V_{OSENSE1, 2}
I_{VOSENSE1, 2}
V_REFLNREG
V_LOADREG
Regulated Feedback Voltage
Feedback Current
Reference Voltage Line Regulation
Output Voltage Load Regulation
g_{m1, 2}
g_{mGBW1, 2}
I_Q
V_FCB
I_FCB
V_BINHIBIT
Transconductance Amplifier g_m
Transconductance Amplifier GBW
Input DC Supply Current
Normal Mode
Shutdown
Forced Continuous Threshold
Forced Continuous Pin Current
Burst Inhibit (Constant Frequency)
Threshold
(Note 3); I_{TH1, 2} Voltage = 1.2V
l
(Note 3)
V_IN = 4.6V to 28V (Note 3)
(Note 3)
Measured in Servo Loop; ΔI_TH Voltage = 1.2V to 0.7V l
Measured in Servo Loop; ΔI_TH Voltage = 1.2V to 2.0V l
I_{TH1, 2} = 1.2V; Sink/Source 5μA; (Note 3)
I_{TH1, 2} = 1.2V; (Note 3)
(Note 4)
V_OUT1 = 5V
V_{RUN/SS1, 2} = 0V
l
V_FCB = 0.85V
Measured at FCB pin
0.792
0.76
–0.50
0.800
±5
0.002
0.1
–0.1
1.3
3
2
20
0.800
–0.18
4.3
0.808
±50
0.02
0.5
–0.5
3
100
0.84
–0.1
4.8
UVLO
Undervoltage Lockout
V_OVL
Feedback Overvoltage Lockout
I_SENSE
Sense Pins Total Source Current
DF_MAX
Maximum Duty Factor
I_TRCKSS1,2 Soft-Start Charge Current
V_{RUN1, 2} ON RUN Pin ON Threshold
V_SENSE(MAX) Maximum Current Sense Threshold
TG1, 2 tr
TG1, 2 tf
BG1, 2 tr
BG1, 2 tf
TG/BG t_1D
TG Transition Time:
Rise Time
Fall Time
BG Transition Time:
Rise Time
Fall Time
Top Gate Off to Bottom Gate On Delay
Synchronous Switch-On Delay Time
V_IN Ramping Down
Measured at V_{OSENSE1, 2}
(Each Channel); V_{SENSE1–, 2–} = V_{SENSE1+, 2+} = 0V
In Dropout
V_{TRCKSS1, 2} = 0.2V
V_RUN1, V_RUN2 Rising
V_OSENSE1,
V_OSENSE1,
2
2
=
=
00..77VV,,VV_{SSEENNSSEE11––,,}
22––
=
=
5V
5V
(Note 5)
C_LOAD = 3300pF
C_LOAD = 3300pF
(Note 5)
C_LOAD = 3300pF
C_LOAD = 3300pF
C_LOAD = 3300pF Each Driver
l
3.5
4
l 0.84 0.86 0.88
–90
–65
98
99.4
0.5
1.2
1.0
1.5
2.0
62
75
85
l 60
75
88
55
100
55
100
65
120
55
100
60
BG/TG t_2D Bottom Gate Off to Top Gate On Delay C_LOAD = 3300pF Each Driver
80
Top Switch-On Delay Time
t_ON(MIN)
Minimum On-Time
INTV_CC Linear Regulator
V_INTVCC
Internal V_CC Voltage
V_LDO INT INTV_CC Load Regulation
Oscillator and Phase-Locked Loop
Tested with a Square Wave (Note 6)
6V < V_IN < 30V
I_CC = 0mA to 20mA
120
4.8
5.0
5.2
0.2
2.0
f_NOM
f_LOW
f_HIGH
I_PLLFLTR
Nominal Frequency
Lowest Frequency
Highest Frequency
Phase Detector Output Current
Sinking Capability
Sourcing Capability
V_PLLFLTR = 1.2V
V_PLLFLTR = 0V
V_PLLFLTR ≥ 2.4V
V_PLLFLTR = 1.2V
f_PLLIN < f_NOM
f_PLLIN > f_NOM
360
400
440
230
260
290
480
550
590
–17
17
UNITS
V
nA
%/V
%
%
mmho
MHz
mA
μA
V
μA
V
V
V
μA
%
μA
V
mV
mV
ns
ns
ns
ns
ns
ns
ns
V
%
kHz
kHz
kHz
μA
μA
3828fc
3