LTC3828 Datasheet, PDF (8/32 Pages) Linear Technology – Dual 2-Phase Step-Down Controller with Tracking

LTC3828
PI FU CTIO S
TG2, TG1 (Pins 17, 25/Pins 16, 25): High Current Gate
Drives for Top N-Channel MOSFETs. These are the outputs
of floating drivers with a voltage swing equal to INTV_CC –
0.5V superimposed on the switch node voltage SW.
SW2, SW1 (Pins 18, 24/Pins 17, 24): Switch Node
Connections to Inductors. Voltage swing at these pins is
from a Schottky diode (external) voltage drop below
ground to V_IN.
BG2, BG1 (Pins 19, 20/Pins 18, 19): High Current Gate
Drives for Bottom (Synchronous) N-Channel MOSFETs.
Voltage swing at these pins is from ground to INTV_CC.
PGND (Pin 21/Pin 20): Driver Power Ground. Connects to
the sources of bottom (synchronous) N-channel MOSFETs,
anodes of the Schottky rectifiers and the (–) terminal(s) of C_IN.
DRV_CC (Pin 21 QFN Only): External Power Input to gate
drives. It can be connected with INT_VCC together and use
INT_VCC as gate drives power supply.
INTV_CC (Pin 22/Pin 22): Output of the Internal 5V Linear
Low Dropout Regulator. The driver and control circuits are
powered from this voltage source. Must be decoupled to
power ground with a minimum of 4.7µF tantalum or other low
ESR capacitor.
V_IN (Pin 23/Pin 23): Main Supply Pin. A bypass capacitor
should be tied between this pin and the signal ground pin.
PGOOD (Pin 27/Pin 27): Open-Drain Logic Output. PGOOD
is pulled to ground when the voltage on either V_OSENSE pin
is not within ±7.5% of its set point.
CLKOUT (Pin 28/Pin 28): Output Clock Signal available to
daisychain other controller ICs for additional MOSFET
driver stages/phases.
NC (Pins 8, 9 QFN Only): These “No Connect” pins are not
tied internally to anything. On the PC layout, these pin
landings should be connected to the SGND plane under
the IC.
Exposed Pad (Pin 33, QFN Only): Signal Ground. Must be
soldered to the PCB, providing a local ground for the
control components of the IC, and be tied to the PGND pin
under the IC.
3828f
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