LTC3828 Datasheet, PDF (22/32 Pages) Linear Technology – Dual 2-Phase Step-Down Controller with Tracking

LTC3828
APPLICATIO S I FOR ATIO
The resistive load reduces the DC loop gain while main-
taining the linear control range of the error amplifier. The
maximum output voltage deviation can theoretically be
reduced to half or alternatively the amount of output
capacitance can be reduced for a particular application. A
complete explanation is included in Design Solutions 10.
(See www.linear.com)
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can be
expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of
the losses in LTC3828 circuits: 1) IC V_IN current, 2) INTV_CC
regulator current, 3) I²R losses, 4) Topside MOSFET
transition losses.
1. The V_IN current has two components: the first is the DC
supply current given in the Electrical Characteristics table,
which excludes MOSFET driver and control currents; V_IN
current typically results in a small (<0.1%) loss.
2. INTV_CC current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results from
switching the gate capacitance of the power MOSFETs.
Each time a MOSFET gate is switched from low to high to
low again, a packet of charge dQ moves from INTV_CC to
ground. The resulting dQ/dt is a current out of INTV_CC that
is typically much larger than the control circuit current. In
continuous mode, I_GATECHG =f(Q_T+Q_B), where Q_T and Q_B
are the gate charges of the topside and bottom side
MOSFETs.
3. I²R losses are predicted from the DC resistances of the
fuse (if used), MOSFET, inductor, current sense resistor,
and input and output capacitor ESR. In continuous mode
the average output current flows through L and R_SENSE,
but is “chopped” between the topside MOSFET and the
synchronous MOSFET. If the two MOSFETs have approxi-
mately the same R_DS(ON), then the resistance of one
MOSFET can simply be summed with the resistances of L,
R_SENSE and ESR to obtain I²R losses. For example, if each
R_DS(ON) = 30mΩ, R_L = 50mΩ, R_SENSE = 10mΩ and R_ESR
= 40mΩ (sum of both input and output capacitance
losses), then the total resistance is 130mΩ. This results in
losses ranging from 3% to 13% as the output current
increases from 1A to 5A for a 5V output, or a 4% to 20%
loss for a 3.3V output. Efficiency varies as the inverse
square of V_OUT for the same external components and
output power level. The combined effects of increasingly
lower output voltages and higher currents required by
high performance digital systems is not doubling but
quadrupling the importance of loss terms in the switching
regulator system!
4. Transition losses apply only to the topside MOSFET(s),
and become significant only when operating at high input
voltages (typically 15V or greater). Transition losses can
be estimated from:
( ) ( ) ^{Transition Loss =}
V_IN
2
•
⎛
⎝⎜
I_MAX
2
⎞
⎠⎟
R_DR
•
( )( ) ^CMILLER
f
⎛
⎝⎜
5V
1
– V_TH
+
1^⎞
V_TH ⎠⎟
Other “hidden” losses such as copper trace and internal
battery resistances can account for an additional 5% to 10%
efficiency degradation in portable systems. It is very impor-
tant to include these “system” level losses during the de-
sign phase. The internal battery and fuse resistance losses
can be minimized by making sure that C_IN has adequate
charge storage and very low ESR at the switching frequency.
A 25W supply will typically require a minimum of 20µF to
40µF of capacitance having a maximum of 20mΩ to 50mΩ
of ESR. The LTC3828 2-phase architecture typically halves
this input capacitance requirement over competing solu-
tions. Other losses including Schottky conduction losses
during dead-time and inductor core losses generally ac-
count for less than 2% total additional loss.
3828f
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