LTC3828 Datasheet, PDF (3/32 Pages) Linear Technology – Dual 2-Phase Step-Down Controller with Tracking

LTC3828
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T_A = 25°C. V_IN = 15V, V_{RUN1, 2} = 5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
g_{mGBW1, 2}
I_Q
V_FCB
I_FCB
V_BINHIBIT
Transconductance Amplifier GBW
Input DC Supply Current
Normal Mode
Shutdown
Forced Continuous Threshold
Forced Continuous Pin Current
Burst Inhibit (Constant Frequency)
Threshold
I_{TH1, 2} = 1.2V; (Note 3)
(Note 4)
V_IN = 15V; V_OUT1 = 5V
V_{RUN/SS1, 2} = 0V
V_FCB = 0.85V
Measured at FCB pin
3
MHz
2
3
mA
20
100
µA
● 0.76 0.800 0.84
V
– 0.50 – 0.18 – 0.1
µA
4.3
4.8
V
UVLO
V_OVL
Undervoltage Lockout
Feedback Overvoltage Lockout
V_IN Ramping Down
Measured at V_{OSENSE1, 2}
●
3.5
4
V
● 0.84 0.86 0.88
V
I_SENSE
Sense Pins Total Source Current
(Each Channel); V_SENSE1–_{, 2}– = V_SENSE1+_{, 2}+ = 0V
– 90 – 65
µA
DF_MAX
Maximum Duty Factor
In Dropout
98
99.4
%
I_TRCKSS1,2
Soft-Start Charge Current
0.5
1.2
µA
V_{RUN1, 2} ON RUN Pin ON Threshold
V_RUN1, V_RUN2 Rising
1.0
1.5
2.0
V
V_SENSE(MAX) Maximum Current Sense Threshold
V_{OSENSE1, 2} = 0.7V,V_SENSE1–_{, 2} – = 5V
V_{OSENSE1, 2} = 0.7V,V_SENSE1–_{, 2} – = 5V
62
75
85
mV
● 60
75
88
mV
TG1, 2 t_r
TG1, 2 t_f
TG Transition Time:
Rise Time
Fall Time
(Note 5)
C_LOAD = 3300pF
C_LOAD = 3300pF
55
100
ns
55
100
ns
BG1, 2 t_r
BG1, 2 t_f
BG Transition Time:
Rise Time
Fall Time
(Note 5)
C_LOAD = 3300pF
C_LOAD = 3300pF
65
120
ns
55
100
ns
TG/BG t_1D
Top Gate Off to Bottom Gate On Delay
Synchronous Switch-On Delay Time C_LOAD = 3300pF Each Driver
60
ns
BG/TG t_2D
Bottom Gate Off to Top Gate On Delay
Top Switch-On Delay Time
C_LOAD = 3300pF Each Driver
80
ns
t_ON(MIN)
Minimum On-Time
Tested with a Square Wave (Note 6)
120
ns
INTV_CC Linear Regulator
V_INTVCC
Internal V_CC Voltage
6V < V_IN < 30V
4.8
5.0
5.2
V
V_LDO INT
INTV_CC Load Regulation
I_CC = 0 to 20mA
0.2
2.0
%
Oscillator and Phase-Locked Loop
f_NOM
f_LOW
f_HIGH
I_PLLFLTR
Nominal Frequency
Lowest Frequency
Highest Frequency
Phase Detector Output Current
Sinking Capability
Sourcing Capability
PGOOD Output
V_PLLFLTR = 1.2V
V_PLLFLTR = 0V
V_PLLFLTR ≥ 2.4V
f_PLLIN < f_OSC
f_PLLIN > f_OSC
360 400 440
kHz
230 260 290
kHz
480 550 590
kHz
–17
µA
17
µA
V_PGL
I_PGOOD
V_PG
PGOOD Voltage Low
PGOOD Leakage Current
PGOOD Trip Level, Either Controller
I_PGOOD = 2mA
V_PGOOD = 5V
V_OSENSE with Respect to Set Output Voltage
V_OSENSE Ramping Negative
V_OSENSE Ramping Positive
0.1
0.3
V
±1
µA
–6
–7.5 – 9.5
%
6
7.5
9.5
%
3828f
3