LTC3737_15 Datasheet, PDF(8/24 Page) Linear Technology – Dual 2-Phase, No RSENSE, DC/DC Controller with Output Tracking

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LTC3737_15 Datasheet, PDF (8/24 Pages) Linear Technology – Dual 2-Phase, No RSENSE, DC/DC Controller with Output Tracking

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LTC3737

OPERATIO (Refer to Functional Diagram)

Main Control Loop

The LTC3737 uses a constant frequency, current mode

architecture with the two controller channels operating

180 degrees out of phase. During normal operation, each

external P-channel power MOSFET is turned on when the

clock for that channel sets the RS latch, and turned off

when the current comparator (ICMP) resets the latch. The

peak inductor current at which ICMP resets the RS latch is

determined by the voltage on the ITH pin, which is the

output of each error amplifier (EAMP). The VFB pin re-

ceives the output voltage feedback signal from an external

resistor divider. This feedback signal is compared to the

internal 0.6V reference voltage by the EAMP. When the

load current increases, it causes a slight decrease in VFB

relative to the 0.6V reference, which in turn, causes the ITH

voltage to increase until the average inductor current

matches the new load current.

Shutdown, Soft-Start and Tracking Start-Up

(RUN/SS and TRACK Pins)

The LTC3737 is shut down by pulling the RUN/SS pin low.

In shutdown, all controller functions are disabled and the

chip draws only 9ÂµA. The PGATE outputs are held high

(off) in shutdown. Releasing RUN/SS allows an internal

0.7ÂµA current source to charge up the RUN/SS pin. When

the RUN/SS pin reaches 0.65V, the LTC3737âs two con-

trollers are enabled.

The start-up of VOUT1 is controlled by the LTC3737âs

internal soft-start. During soft-start, the error amplifier

EAMP compares the feedback signal VFB1 to the internal

soft-start ramp (instead of the 0.6V reference), which rises

linearly from 0V to 0.6V in about 1ms. This allows the

output voltage to rise smoothly from 0V to its final value,

while maintaining control of the inductor current.

The 1ms soft-start time can be increased by connecting

the optional external soft-start capacitor, CSS, between the

RUN/SS and SGND pins. As the RUN/SS pin continues to

rise linearly from approximately 0.65V to 1.3V (being

charged by the internal 0.7ÂµA current source), the EAMP

regulates VFB1 linearly from 0V to 0.6V.

The start-up of VOUT2 is controlled by the voltage on the

TRACK pin. When the voltage on the TRACK pin is less

than the 0.6V internal reference, the LTC3737 regulates

the VFB2 voltage to the TRACK pin instead of the 0.6V

reference. Typically, a resistor divider on VOUT1 is con-

nected to the TRACK pin to allow the start-up of VOUT2 to

âtrackâ that of VOUT1. For one-to-one tracking during start-

up, the resistor divider would have the same values as the

divider on VOUT2 that is connected to VFB2.

If no tracking function is desired, then the TRACK pin can

be tied to VIN. Note, however, that in this situation, there

would be no (internal or external) soft-start on VOUT2.

Light Load Operation (Burst Mode Operation or Pulse

Skipping Mode) (SYNC/MODE Pin)

The LTC3737 can be enabled to enter high efficiency Burst

Mode operation at low load currents. To select Burst Mode

operation, tie the SYNC/MODE pin to a DC voltage above

0.6V (e.g., VIN). To disable Burst Mode operation and

enable PWM pulse skipping mode, connect SYNC/MODE

to a DC voltage below 0.6V (e.g., SGND). In this mode, the

efficiency is lower at light loads. However, pulse skipping

mode has the advantages of lower output ripple and less

interference to audio circuitry.

When a controller is in Burst Mode operation, the peak

current in the inductor is set to approximate one-fourth of

the maximum sense voltage even when the voltage on the

ITH pin indicates a lower value. If the average inductor

current is greater than the load current, the EAMP will

decrease the voltage on the ITH pin. When the ITH voltage

drops below 0.85V, the internal SLEEP signal goes high

and the external MOSFET is turned off.

In sleep mode, much of the internal circuitry is turned off,

reducing the quiescent current that the LTC3737 draws.

The load current is supplied by the output capacitor. As the

output voltage decreases, the EAMP increases the ITH

voltage. When the ITH voltage reaches 0.925V, the SLEEP

signal goes low and the controller resumes normal opera-

tion by turning on the external P-channel MOSFET on the

next cycle of the internal oscillator.

When the SYNC/MODE pin is clocked by an external clock

source to use the phase-locked loop (see Frequency

Selection and Phase-Locked Loop), the LTC3737 operates

in PWM pulse skipping mode at light loads.

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