LTC3737_15 Datasheet, PDF (23/24 Pages) Linear Technology – Dual 2-Phase, No RSENSE, DC/DC Controller with Output Tracking

LTC3737
PACKAGE DESCRIPTIO
GN Package
24-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.045 ±.005
.337 – .344*
(8.560 – 8.738)
24 23 22 21 20 19 18 17 16 15 1413
.033
(0.838)
REF
.254 MIN
.150 – .165
.229 – .244
(5.817 – 6.198)
.150 – .157**
(3.810 – 3.988)
.0165 ± .0015
.0250 BSC
RECOMMENDED SOLDER PAD LAYOUT
.015 ± .004
(0.38 ± 0.10)
× 45°
.0075 – .0098
(0.19 – 0.25)
0° – 8° TYP
1 2 3 4 5 6 7 8 9 10 11 12
.0532 – .0688
(1.35 – 1.75)
.004 – .0098
(0.102 – 0.249)
.016 – .050
(0.406 – 1.270)
NOTE:
1. CONTROLLING DIMENSION: INCHES
2.
DIMENSIONS
ARE
IN
INCHES
(MILLIMETERS)
3. DRAWING NOT TO SCALE
.008 – .012
(0.203 – 0.305)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
.0250
(0.635)
BSC
GN24 (SSOP) 0204
4.50 ± 0.05
2.45 ± 0.05
(4 SIDES)
3.10 ± 0.05
UF Package
24-Lead Plastic QFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1697)
0.70 ±0.05
4.00 ± 0.10
(4 SIDES)
PIN 1
TOP MARK
(NOTE 6)
0.75 ± 0.05
2.45 ± 0.10
(4-SIDES)
BOTTOM VIEW—EXPOSED PAD
R = 0.115
TYP
0.23 TYP
(4 SIDES)
23 24
0.38 ± 0.10
1
2
PACKAGE OUTLINE
0.25 ±0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE
MO-220 VARIATION (WGGD-X)—TO BE APPROVED
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
0.200 REF
0.00 – 0.05
(UF24) QFN 1103
0.25 ± 0.05
0.50 BSC
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE, IF PRESENT
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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