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LTC3737_15 Datasheet, PDF (19/24 Pages) Linear Technology – Dual 2-Phase, No RSENSE, DC/DC Controller with Output Tracking
LTC3737
APPLICATIO S I FOR ATIO
If the duty cycle falls below what can be accommodated by
the minimum on-time, the LTC3737 will begin to skip
cycles. The output voltage will continue to be regulated,
but the ripple current and ripple voltage will increase.
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting efficiency and which change would produce the
most improvement. Efficiency can be expressed as:
Efficiency = 100% - (L1 + L2 + L3 + …)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, five main sources usually account for most of the
losses in LTC3737 circuits: 1) LTC3737 DC bias current,
2) MOSFET gate charge current, 3) I2R losses, 4) voltage
drop of the output diode and 5) transition losses.
1) The VIN (pin) current is the DC supply current, given in
the electrical characteristics, that excludes MOSFET
driver currents. VIN current results in a small loss that
increases with VIN.
2) MOSFET gate charge current results from switching the
gate capacitance of the power MOSFET. Each time a
MOSFET gate is switched from low to high to low again,
a packet of charge dQ moves from PVIN to ground. The
resulting dQ/dt is a current out of PVIN, which is
typically much larger than the DC supply current. In
continuous mode, IGATECHG = f • QP.
3) I2R losses are calculated from the DC resistances of the
MOSFET, inductor and sense resistor. In continuous
mode, the average output current flows through L but
is “chopped” between the P-channel MOSFET and the
output diode. The MOSFET RDS(ON) multiplied by duty
cycle can be summed with the resistance of L to obtain
I2R losses.
4) The output diode is a major source of power loss at high
currents and is worse at high input voltages. The diode
loss is calculated by multiplying the forward voltage
times the load current times the diode duty cycle.
5) Transition losses apply to the external MOSFET and
increase with higher operating frequencies and input
voltages. Transition losses can be estimated from:
Transition Loss = 2(VIN)2 • IO(MAX) • CRSS(f)
Other losses, including CIN and COUT ESR dissipative
losses and inductor core losses, generally account for less
than 2% total additional loss.
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to (∆ILOAD)(ESR), where ESR is the effective series
resistance of COUT. ∆ILOAD also begins to charge or dis-
charge COUT, which generates a feedback error signal. The
regulator loop then returns VOUT to its steady-state value.
During this recovery time, VOUT can be monitored for over-
shoot or ringing. OPTI-LOOP® compensation allows the
transient response to be optimized over a wide range of
output capacitance and ESR values.
The ITH series RC-CC filter (see Functional Diagram) sets
the dominant pole-zero loop compensation. The ITH exter-
nal components shown in the Figure 1 circuit will provide
an adequate starting point for most applications. The
values can be modified slightly (from 0.2 to 5 times their
suggested values) to optimize transient response once the
final PC layout is done and the particular output capacitor
type and value have been determined. The output capaci-
tors need to be decided upon because the various types
and values determine the loop feedback factor gain and
phase. An output current pulse of 20% to 100% of full load
current having a rise time of 1µs to 10µs will produce
output voltage and ITH pin waveforms that will give a sense
of the overall loop stability. The gain of the loop will be
increased by increasing RC, and the bandwidth of the loop
will be increased by decreasing CC. The output voltage
settling behavior is related to the stability of the closed-
loop system and will demonstrate the actual overall supply
performance. For a detailed explanation of optimizing the
compensation components, including a review of control
loop theory, refer to Application Note 76.
OPTI-LOOP is a registered trademark of Linear Technology Corporation.
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