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LTC3412A Datasheet, PDF (8/20 Pages) Linear Technology – 3A, 4MHz, Monolithic Synchronous Step-Down Regulator
LTC3412A
W
FUNCTIONAL BLOCK DIAGRA
SVIN
SGND
ITH
1
8
3
PVIN
9
16
VFB 4
VOLTAGE
REFERENCE
0.8V
+
–
ERROR
AMPLIFIER
SYNC/MODE
0.74V +
–
+
RUN/SS 7 RUN
0.86V –
PGOOD 2
SLOPE
COMPENSATION
RECOVERY
BCLAMP
PMOS CURRENT
COMPARATOR
+
–
+
–+
BURST
COMPARATOR
OSCILLATOR
–
SLOPE
COMPENSATION
LOGIC
+
P-CH
N-CH
10
11
SW
14
15
–
NMOS
CURRENT
COMPARATOR
–
+
REVERSE
CURRENT
COMPARATOR
5
6
RT
SYNC/MODE
12
PGND
13
3412 FBD
U
OPERATIO
Main Control Loop
The LTC3412A is a monolithic, constant-frequency, current-
mode step-down DC/DC converter. During normal opera-
tion, the internal top power switch (P-channel MOSFET) is
turned on at the beginning of each clock cycle. Current in
the inductor increases until the current comparator trips
and turns off the top power MOSFET. The peak inductor
current at which the current comparator shuts off the top
power switch is controlled by the voltage on the ITH pin.
The error amplifier adjusts the voltage on the ITH pin by
comparing the feedback signal from a resistor divider on
the VFB pin with an internal 0.8V reference. When the load
current increases, it causes a reduction in the feedback
voltage relative to the reference. The error amplifier raises
the ITH voltage until the average inductor current matches
the new load current. When the top power MOSFET shuts
off, the synchronous power switch (N-channel MOSFET)
turns on until either the bottom current limit is reached or
the beginning of the next clock cycle. The bottom current
limit is set at –1.3A for forced continuous mode and 0A
for Burst Mode operation.
3412afc
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