LTC3412A Datasheet, PDF (14/20 Pages) Linear Technology – 3A, 4MHz, Monolithic Synchronous Step-Down Regulator

LTC3412A
APPLICATIO S I FOR ATIO
When a load step occurs, V_OUT immediately shifts by an
amount equal to ΔI_LOAD(ESR), where ESR is the effective
series resistance of C_OUT. ΔI_LOAD also begins to charge or
discharge C_OUT generating a feedback error signal used by
the regulator to return V_OUT to its steady-state value. During
this recovery time, V_OUT can be monitored for overshoot
or ringing that would indicate a stability problem. The I_TH
pin external components and output capacitor shown in
Figure 1 will provide adequate compensation for most
applications.
Design Example
As a design example, consider using the LTC3412A in an
application with the following specifications:
V_IN = 3.3V, V_OUT = 2.5V, I_OUT(MAX) = 3A,
I_OUT(MIN) = 100mA, f = 1MHz.
Because efficiency is important at both high and low load
current, Burst Mode operation will be utilized.
First, calculate the timing resistor:
R_OSC
=
3.08 •10¹¹
1• 10⁶
–
10k
=
298k
Use a standard value of 294k. Next, calculate the inductor
value for about 40% ripple current at maximum V_IN:
L
=



2.5V ^
(1MHz)(1.2A)



1–
2.5V
3.3V


=
0.51μH
Using a 0.47μH inductor results in a maximum ripple
current of:

I_L
=


2.5V 
(1MHz)(0.47μH)


1–
2.5V
3.3V


=
1.29A
C_OUT will be selected based on the ESR that is required to
satisfy the output voltage ripple requirement and the bulk
capacitance needed for loop stability. For this design, two
100μF ceramic capacitors will be used.
C_IN should be sized for a maximum current rating of:
I_RMS
=
(3A)



2.5V
3.3V


3.3V
2.5V
–
1=
1.29A_RMS
Decoupling the PV_IN and SV_IN pins with two 22μF capaci-
tors is adequate for most applications.
The burst clamp and output voltage can now be pro-
grammed by choosing the values of R1, R2, and R3. The
voltage on pin MODE will be set to 0.50V by the resistor
divider consisting of R2 and R3. According to the graph
of Minimum Peak Inductor Current vs Burst Clamp Volt-
age in the Typical Performance Characteristics section, a
burst clamp voltage of 0.5V will set the minimum inductor
current, I_BURST, to approximately 1.1A.
If we set the sum of R2 and R3 to 185k, then the following
equations can be solved:
R2 + R3 = 185k
1+ ^R2 = ^0.8V
R3 0.50V
The two equations shown above result in the following
values for R2 and R3: R2 = 69.8k , R3 = 115k. The value
of R1 can now be determined by solving the following
equation.
1+ ^R1 = ^2.5V
185k 0.8V
R1= 392k
A value of 392k will be selected for R1. Figure 4 shows
the complete schematic for this design example.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3412A. Check the following in your layout:
1. A ground plane is recommended. If a ground plane
layer is not used, the signal and power grounds should
be segregated with all small signal components returning
to the SGND pin at one point which is then connected to
the PGND pin close to the LTC3412A.
2. Connect the (+) terminal of the input capacitor(s), C_IN, as
close as possible to the PV_IN pin. This capacitor provides
the AC current into the internal power MOSFETs.
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