LTC3412A Datasheet, PDF (3/20 Pages) Linear Technology – 3A, 4MHz, Monolithic Synchronous Step-Down Regulator

LTC3412A
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T_A = 25°C. V_IN = 3.3V unless otherwise specified.
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
SV_IN
V_FB
I_FB
ΔV_FB
V_LOADREG
ΔV_PGOOD
R_PGOOD
I_Q
f_OSC
Signal Input Voltage Range
Regulated Feedback Voltage
Voltage Feedback Leakage Current
Reference Voltage Line Regulation
Output Voltage Load Regulation
Power Good Range
Power Good Pull-Down Resistance
Input DC Bias Current
Active Current
Sleep
Shutdown
Switching Frequency
Switching Frequency Range
(Note 3)
V_IN = 2.7V to 5.5V (Note 3)
Measured in Servo Loop, V_ITH = 0.36V
Measured in Servo Loop, V_ITH = 0.84V
(Note 4)
V_FB = 0.78V, V_ITH = 1V
V_FB = 1V, V_ITH = 0V
V_RUN = 0V, V_MODE = 0V
R_OSC = 294kΩ
(Note 6)
2.25
5.5
V
● 0.784 0.800 0.816
V
0.1
0.2
μA
●
0.04 0.2
%V
●
0.02 0.2
%
●
–0.02 –0.2
%
±7.5
±9
%
120 200
Ω
250 330
μA
64
80
μA
0.02
1
μA
0.88
1
1.1
MHz
0.3
4
MHz
f_SYNC
SYNC Capture Range
(Note 6)
0.3
4
MHz
R_PFET
R_DS(ON) of P-Channel FET
I_SW = 1A (Note 7)
77
110
mΩ
R_NFET
R_DS(ON) of N-Channel FET
I_SW = –1A (Note 7)
65
90
mΩ
I_LIMIT
Peak Current Limit
4.5
6
A
V_UVLO
Undervoltage Lockout Threshold
1.75
2
2.25
V
I_LSW
SW Leakage Current
V_RUN = 0V, V_IN = 5.5V
0.1
1
μA
V_RUN
RUN Threshold
0.5
0.65
0.8
V
I_RUN
RUN/SS Leakage Current
1
μA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3412AE is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the – 40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTC3412AI is guaranteed to
meet performance specifications over the full –40°C to 85°C operating
temperature range.
Note 3: The LTC3412A is tested in a feedback loop that adjusts V_FB to
achieve a specified error amplifier output voltage (I_TH).
Note 4: Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note 5: T_J is calculated from the ambient temperature T_A and power
dissipation as follows: LTC3412AFE: T_J = T_A + P_D (38°C/W)
LTC3412AUF: T_J = T_A + P_D (34°C/W)
Note 6: 4MHz operation is guaranteed by design and not production tested.
Note 7: Switch on resistance is guaranteed by design and test condition in
the UF package and by final test correlation in the FE package.
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