LTC3260_15 Datasheet, PDF (8/18 Pages) Linear Technology – Low Noise Dual Supply Inverting Charge Pump

LTC3260
Block Diagram
Note: Pin numbers are as per DFN package. Refer to the Pin Functions section for corresponding MSOP pin numbers.
V_IN
9
C⁺
8
INVERTING
CHARGE PUMP
S1
S3
C^–
S2
7
S4
V_OUT
6
RT
2
50kHz
TO
500kHz
OSC
EN^–
11
MODE
12
CHARGE
PUMP
AND
INPUT
LOGIC
1
EN⁺
1.2V
REF
–1.2V
REF
GND
15
LDO⁺
10
ADJ⁺
13
BYP⁺
14
BYP^–
3
ADJ^–
4
LDO^–
5
Operation (Refer to the Block Diagram)
The LTC3260 is a high voltage low noise dual output
regulator. It includes an inverting charge pump and two
LDO regulators to generate bipolar low noise supply rails
from a single positive input. It supports a wide input power
supply range from 4.5V to 32V.
Shutdown Mode
In shutdown mode, all circuitry except the internal bias is
turned off. The LTC3260 is in shutdown when a logic low
is applied to both the enable inputs (EN⁺ and EN^–). The
LTC3260 only draws 2µA (typical) from the V_IN supply
in shutdown.
Charge Pump Constant Frequency Operation
The LTC3260 provides low noise constant frequency op-
eration when a logic low is applied to the MODE pin. The
charge pump and oscillator circuit are enabled using the
EN^– pin. At the beginning of a clock cycle, switches S1 and
S2 are closed. The external flying capacitor across the C⁺
and C^– pins is charged to the V_IN supply. In the second
phase of the clock cycle, switches S1 and S2 are opened,
while switches S3 and S4 are closed. In this configuration
the C⁺ side of the flying capacitor is grounded and charge
is delivered through the C^– pin to V_OUT. In steady state
the V_OUT pin regulates at –V_IN less any voltage drop due
to the load current on V_OUT or LDO.
3260fa
8