LTC3404 Datasheet, PDF (6/16 Pages) Linear Technology – 1.4MHz High Efficiency Monolithic Synchronous Step-Down Regulator

LTC3404
PI FU CTIO S
RUN (Pin 1): Run Control Input. Forcing this pin below
0.4V shuts down the LTC3404. In shutdown all functions
are disabled drawing < 1µA supply current. Forcing this
pin above 1.2V enables the LTC3404. Do not leave RUN
floating.
I_TH (Pin 2): Error Amplifier Compensation Point. The
current comparator threshold increases with this control
voltage. Nominal voltage range for this pin is from 0.5V
to 1.9V.
V_FB (Pin 3): Feedback Pin. Receives the feedback voltage
from an external resistive divider across the output.
GND (Pin 4): Ground Pin.
SW (Pin 5): Switch Node Connection to Inductor. This pin
connects to the drains of the internal main and synchro-
nous power MOSFET switches.
V_IN (Pin 6): Main Supply Pin. Must be closely decoupled
to GND, Pin 4.
SYNC/MODE (Pin 7): External Clock Synchronization and
Mode Select Input. To synchronize with an external clock,
apply a clock with a frequency between 1MHz and 1.7MHz.
To select Burst Mode operation, tie to V_IN. Grounding this
pin selects pulse skipping mode. Do not leave this pin
floating.
PLL LPF (Pin 8): Output of the Phase Detector and Control
Input of Oscillator. Connect a series RC lowpass network
from this pin to ground if externally synchronized. If
unused, this pin may be left open.
W
FU CTIO AL DIAGRA
PLL LPF
8
SYNC/MODE
7
BURST
DEFEAT ^Y
X
Y = “0” ONLY WHEN X IS A CONSTANT “1”
SLOPE
COMP
VCO
OSC
V_IN
0.8V
0.6V –
3
+
V_FB
FREQ
SHIFT
V_REF +
0.8V
– ^EA
g_m = 0.5m ^Ω
V_IN SLEEP
V_IN
V_IN
RUN
1
0.8V REF
–
OVDET
0.85V +
SHUTDOWN
0.55V
2 I_TH
– ^EN _SLEEP
+
BURST
SQ
RQ
RS LATCH
SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
I_COMP
ANTI-
SHOOT-
THRU
I_RCMP
6 V_IN
6Ω
P-CH P-CH
5 SW
N-CH
4 GND
3404 BD
6