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LTC3404 Datasheet, PDF (12/16 Pages) Linear Technology – 1.4MHz High Efficiency Monolithic Synchronous Step-Down Regulator
LTC3404
APPLICATIO S I FOR ATIO
Thermal Considerations
In most applications the LTC3404 does not dissipate
much heat due to its high efficiency. But, in applications
where the LTC3404 is running at high ambient tempera-
ture with low supply voltage and high duty cycles, such
as in dropout, the heat dissipated may exceed the maxi-
mum junction temperature of the part. If the junction
temperature reaches approximately 175°C, both power
switches will be turned off and the SW node will become
high impedance.
To avoid the LTC3404 from exceeding the maximum
junction temperature, the user will need to do some
thermal analysis. The goal of the thermal analysis is to
determine whether the power dissipated exceeds the
maximum junction temperature of the part. The tempera-
ture rise is given by:
TR = (PD)(θJA)
where PD is the power dissipated by the regulator and qJA
is the thermal resistance from the junction of the die to the
ambient temperature.
The junction temperature, TJ, is given by:
TJ = TA + TR
where TA is the ambient temperature.
As an example, consider the LTC3404 in dropout at an
input voltage of 3V, a load current of 500mA, and an
ambient temperature of 70°C. From the typical perfor-
mance graph of switch resistance, the RDS(ON) of the
P-channel switch at 70°C is approximately 0.7Ω. There-
fore, power dissipated by the part is:
PD = ILOAD2 • RDS(ON) = 0.175W
For the MSOP package, the θJA is 150°C/ W. Thus, the
junction temperature of the regulator is:
TJ = 70°C + (0.175)(150) = 96°C
which is below the maximum junction temperature of
125°C.
Note that at higher supply voltages, the junction tempera-
ture is lower due to reduced switch resistance (RDS(ON)).
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to (∆ILOAD • ESR), where ESR is the effective series
resistance of COUT. ∆ILOAD also begins to charge or
discharge COUT, which generates a feedback error signal.
The regulator loop then acts to return VOUT to its steady-
state value. During this recovery time VOUT can be moni-
tored for overshoot or ringing that would indicate a stabil-
ity problem. The internal compensation provides adequate
compensation for most applications. But if additional
compensation is required, the ITH pin can be used for
external compensation using RC, CC1 as shown in
Figure 7. (The 47pF capacitor, CC2, is typically needed for
noise decoupling.)
CC2
OPTIONAL
RC CC1
R2
R1
LTC3404
1
RUN
8
PLL LPF
2
7
ITH SYNC/MODE
3
VFB
VIN 6
4
GND
5
SW
CIN +
BOLD LINES INDICATE
HIGH CURRENT PATHS
+
L1
+
+
VOUT VIN
COUT
12
Figure 7. LTC3404 Layout Diagram
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3404 F07