LTC3867_15 Datasheet, PDF (29/36 Pages) Linear Technology – Low IQ, Dual 2-Phase Synchronous Step-Down Controller

LTC3867
APPLICATIONS INFORMATION
If the duty cycle falls below what can be accommodated
by the minimum on-time, the controller will begin to skip
cycles. The output voltage will continue to be regulated,
but the voltage ripple and current ripple will increase.
The minimum on-time for the LTC3867 is approximately
65ns, with good PCB layout, minimum 30% inductor
current ripple and at least 10mV ripple on the current
sense signal. The minimum on-time can be affected by
PCB switching noise in the voltage and current loop. As
the peak sense voltage decreases the minimum on-time
gradually increases to about 100ns. This is of particular
concern in forced continuous applications with low ripple
current at light loads. If the duty cycle drops below the
minimum on-time limit in this situation, a significant
amount of cycle skipping can occur with correspondingly
larger current and voltage ripple.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most
of the losses in LTC3867 circuits: 1) IC V_IN current, 2)
INTV_CC regulator current, 3) I²R losses, 4) topside MOSFET
transition losses.
1. The V_IN current is the DC supply current given in the
Electrical Characteristics table, which excludes MOSFET
driver and control currents. V_IN current typically results
in a small (<0.1%) loss.
2. INTV_CC current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from INTV_CC to ground. The resulting dQ/dt is a current
out of INTV_CC that is typically much larger than the
control circuit current. In continuous mode, I_GATECHG
= f(Q_T + Q_B), where Q_T and Q_B are the gate charges
of the topside and bottom side MOSFETs. Supplying
INTV_CC power through EXTV_CC from an output-derived
source will scale the V_IN current required for the driver
and control circuits by a factor of (duty cycle)/(effi-
ciency). For example, in a 20V to 5V application, 10mA
of INTV_CC current results in approximately 2.5mA of
V_IN current. This reduces the mid-current loss from
10% or more (if the driver was powered directly from
V_IN) to only a few percent.
3. I²R losses are predicted from the DC resistances of
the fuse (if used), MOSFET, inductor and current sense
resistor. In continuous mode, the average output current
flows through L and R_SENSE, but is chopped between
the topside MOSFET and the synchronous MOSFET. If
the two MOSFETs have approximately the same R_DS(ON),
then the resistance of one MOSFET can simply be
summed with the resistances of L and R_SENSE to ob-
tain I²R losses. For example, if each R_DS(ON) = 10mΩ,
R_L = 10mΩ, R_SENSE = 5mΩ, then the total resistance is
25mΩ. This results in losses ranging from 2% to 8%
as the output current increases from 3A to 15A for a 5V
output, or a 3% to 12% loss for a 3.3V output.
Efficiency varies as the inverse square of V_OUT for the
same external components and output power level. The
combined effects of increasingly lower output voltages
and higher currents required by high performance digital
systems is not doubling but quadrupling the importance
of loss terms in the switching regulator system!
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