LTC3867_15 Datasheet, PDF (22/36 Pages) Linear Technology – Low IQ, Dual 2-Phase Synchronous Step-Down Controller

LTC3867
APPLICATIONS INFORMATION
V_IN
MILLER EFFECT
V_GS
a
b
Q_IN
C_MILLER = (Q_B – Q_A)/V_DS
V
+
V_GS
–
+
– ^VDS
3767 F09
Figure 9. Gate Charge Characteristic
across the current source load. The upper sloping line is
due to the drain-to-gate accumulation capacitance and
the gate-to-source capacitance. The Miller charge (the
increase in coulombs on the horizontal axis from a to b
while the curve is flat) is specified for a given V_DS drain
voltage, but can be adjusted for different V_DS voltages by
multiplying the ratio of the application V_DS to the curve
specified V_DS values. A way to estimate the C_MILLER term
is to take the change in gate charge from points a and b
on a manufacturer’s data sheet and divide by the stated
V_DS voltage specified. C_MILLER is the most important se-
lection criteria for determining the transition loss term in
the top MOSFET but is not directly specified on MOSFET
data sheets. C_RSS and C_OS are specified sometimes but
definitions of these parameters are not included. When the
controller is operating in continuous mode the duty cycles
for the top and bottom MOSFETs are given by:
Main Switch Duty Cycle = ^VOUT
V_IN
Synchronous
Switch
Duty
Cycle
=


V_IN
– V_OUT
V_IN


The power dissipation for the main and synchronous
MOSFETs at maximum output current are given by:
( ) ( ) P_MAIN
=
V_OUT
V_IN
I_MAX
2
1+ δ
R_DS(ON) +
( ) ( )( ) ^V_IN
2


I_MAX
2


R_DR
C_MILLER •



V_INTVCC
1
– V_TH(MIN)
+
1
V_TH(MIN)



•
f
( ) ( ) ^P_SYNC
=
V_IN
– V_OUT
V_IN
I_MAX
2
1+ δ
R_DS(ON)
22
where δ is the temperature dependency of R_DS(ON), R_DR
is the effective top driver resistance (approximately 2Ω at
V_GS = V_MILLER), V_IN is the drain potential and the change
in drain potential in the particular application. V_TH(MIN)
is the data sheet specified typical gate threshold voltage
specified in the power MOSFET data sheet at the specified
drain current. C_MILLER is the calculated capacitance using
the gate charge curve from the MOSFET data sheet and
the technique described above.
Both MOSFETs have I²R losses while the topside N-channel
equation includes an additional term for transition losses,
which peak at the highest input voltage. For V_IN < 20V,
the high current efficiency generally improves with larger
MOSFETs, while for V_IN > 20V, the transition losses rapidly
increase to the point that the use of a higher R_DS(ON) device
with lower C_MILLER actually provides higher efficiency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
a short-circuit when the synchronous switch is on close
to 100% of the period.
The term (1 + δ ) is generally given for a MOSFET in the
form of a normalized R_DS(ON) vs temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
The optional Schottky diodes conduct during the dead
time between the conduction of the two large power
MOSFETs. This prevents the body diode of the bottom
MOSFET from turning on, storing charge during the dead
time and requiring a reverse-recovery period which could
cost as much as several percent in efficiency. A 2A to 8A
Schottky is generally a good compromise for both regions
of operation due to the relatively small average current.
Larger diodes result in additional transition loss due to
their larger junction capacitance.
C_IN and C_OUT Selection
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle (V_OUT)/(V_IN). To prevent
large voltage transients, a low ESR capacitor sized for the
maximum RMS current of one channel must be used. The
maximum RMS capacitor current is given by:
( )( ) ^C_IN
Required I_RMS
≈
I_MAX
V_IN

V_OUT
V_IN – V_OUT ^1/2
3867f