LTC3827 Datasheet, PDF (27/36 Pages) Linear Technology – Low IQ, Dual, 2-Phase Synchronous Step-Down Controller

LTC3827
APPLICATIONS INFORMATION
C_IN is chosen for an RMS current rating of at least 3A at
temperature assuming only this channel is on. C_OUT is
chosen with an ESR of 0.02Ω for low output ripple. The
output ripple in continuous mode will be highest at the
maximum input voltage. The output voltage ripple due to
ESR is approximately:
V_ORIPPLE = R_ESR (ΔI_L) = 0.02Ω(1.67A) = 33mV_P-P
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the IC. These items are also illustrated graphically in the
layout diagram of Figure 11. Figure 12 illustrates the current
waveforms present in the various branches of the 2-phase
synchronous regulators operating in the continuous mode.
Check the following in your layout:
1. Are the top N-channel MOSFETs M1 and M3 located
within 1cm of each other with a common drain connec-
tion at C_IN? Do not attempt to split the input decoupling
for the two channels as it can cause a large resonant
loop.
TRACK/SS1
I_TH1
V_FB1
SENSE1⁺
SENSE1^–
PGOOD2
PGOOD1
TG1
SW1
PLLLPF
BOOST1
PHASMD
BG1
CLKOUT
f_IN
PLLIN/MODE
V_IN
RUN1
RUN2
SGND
SENSE2^–
PGND
EXTV_CC
INTV_CC
SENSE2⁺
BG2
V_FB2
BOOST2
I_TH2
TRACK/SS2
SW2
TG2
FOLDIS
R_PU2
V_PULL-UP
(<8.5V)
PGOOD2
R_PU1
V_PULL-UP
(<8.5V)
PGOOD1
L1
R_SENSE
C_B1
C_VIN
C_INTVCC
+
C_B2
M1
M2
1μF
CERAMIC
R_IN
V_IN
+
C_IN
1μF
CERAMIC
M3
M4
D1
C_OUT1
+
+
C_OUT2
D2
R_SENSE
L2
3827 F11
V_OUT1
GND
V_OUT2
Figure 11. Recommended Printed Circuit Layout Diagram
3827ff
27