LTC3853 Datasheet, PDF (26/36 Pages) Linear Technology – Triple Output, Multiphase Synchronous Step-Down Controller

LTC3853
APPLICATIONS INFORMATION
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the IC. Figure 12 illustrates the current waveforms pres-
ent in the various branches of the 3-phase synchronous
regulators operating in the continuous mode. Check the
following in your layout:
1. Are the top N-channel MOSFETs located within 1 cm of
each other with a common drain connection at C_IN? Do
not attempt to split the input decoupling for the three
channels as it can cause a large resonant loop.
2. Are the signal and power grounds kept separate? The
combined IC signal ground pin and the ground return
of C_INTVCC must return to the combined C_OUT (–) ter-
minals. The V_FB and I_TH traces should be as short as
possible. The path formed by the top N-channel MOSFET,
Schottky diode and the C_IN capacitor should have short
leads and PC trace lengths. The output capacitor (–)
terminals should be connected as close as possible
to the (–) terminals of the input capacitor by placing
the capacitors next to each other and away from the
Schottky loop described above.
3. Do the LTC3853 V_FB pins’ resistive dividers connect to
the (+) terminals of C_OUT? The resistive divider must be
connected between the (+) terminal of C_OUT and signal
ground. The feedback resistor connections should not
be along the high current input feeds from the input
capacitor(s).
4. Are the SENSE⁺ and SENSE^– leads routed together with
minimum PC trace spacing? The filter capacitor between
SENSE⁺ and SENSE^– should be as close as possible
to the IC. Ensure accurate current sensing with Kelvin
connections at the sense resistor or inductor, whichever
is used for current sensing.
5. Is the INTV_CC decoupling capacitor connected close to
the IC, between the INTV_CC and the power ground pins?
This capacitor carries the MOSFET drivers current peaks.
An additional 1μF ceramic capacitor placed immediately
next to the INTV_CC and PGND pins can help improve
noise performance substantially.
6. Keep the switching nodes (SW), top gate nodes (TG),
and boost nodes (BOOST) away from sensitive small-
signal nodes, especially from another channel’s voltage
and current sensing feedback pins. All of these nodes
have very large and fast moving signals and therefore
should be kept on the “output side” of the LTC3853
and occupy minimum PC trace area. If DCR sensing
is used, place the top resistor (Figure 2b, R1) close to
the switching node.
7. Use a modified “star ground” technique: a low imped-
ance, large copper area central grounding point on
the same side of the PC board as the input and output
capacitors with tie-ins for the bottom of the INTV_CC
decoupling capacitor, the bottom of the voltage feedback
resistive divider and the SGND pin of the IC.
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