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LTC3553_15 Datasheet, PDF (25/36 Pages) Linear Technology – Micropower USB Power Manager With Li-Ion Charger, LDO and Buck Regulator
LTC3553
OPERATION
after entering the PDN1 state the pushbutton circuitry will
transition into the hard reset (HR) state.
In the HR state, all supplies are disabled. The PowerPath
circuitry is placed in an ultralow quiescent state to minimize
battery drain. If no external charging supply is present
(VBUS) then the ideal diode is shut down, disconnecting
VOUT from BAT to further minimize battery drain. The ultra-
low power consumption in the HR state makes it ideal for
shipping or long term storage, minimizing battery drain.
The following events cause the state machine to transition
out of HR into the power-up (PUP1) state:
ON input low for 400ms (PB400MS)
Application of external power (EXTPWR)
Upon entering the PUP1 state, the pushbutton circuitry will
sequence up the buck and LDO regulators. The state of the
SEQ pin determines which regulator is enabled before the
other. If SEQ is low, the buck regulator is enabled first. If
SEQ is high, the LDO regulator is enabled first. The second
regulator is enabled once the feedback voltage of the first
regulator nears regulation. The SEQ pin must be tied to
either VOUT or ground.
The BUCK_ON and LDO_ON inputs are ignored in the PUP1
state. The state machine remains in the PUP1 state for
five seconds. During the five seconds, the application’s
microprocessor, powered by the regulators, has time to
boot and assert BUCK_ON and/or LDO_ON. Five seconds
after entering the PUP1 state, the pushbutton circuitry
automatically transitions into the power-on (PON) state.
In the PON state, the regulators can be enabled and shut
down at any time by the BUCK_ON and LDO_ON pins. A
high on BUCK_ON is needed to keep the buck enabled, and
a high on LDO_ON is needed to keep the LDO enabled. To
remain in the PON state, the application circuit must keep
at least one of the BUCK_ON or LDO_ON inputs high, else
the state machine enters the power-down (PDN2) state.
When BUCK_ON and LDO_ON are both low, or when VOUT
drops to its undervoltage lockout (VOUT UVLO) threshold,
the state machine will leave the PON state and enter the
power-down (PDN2) state. In the power-down state (PDN2),
both regulators are kept disabled regardless of the states
of the BUCK_ON and LDO_ON pins. The state machine
remains in the power-down state for one second, before
automatically entering the power-off (POFF) state. This one
second delay allows all LTC3553 generated supplies time
to power down completely before they can be re-enabled.
The same events used to exit the hard reset (HR) state
are also used to exit the POFF state and enter the PUP2
state. The PUP2 state operates in the same manner as
the PUP1 state previously described.
Both regulators remain powered up during the five second
power-up (PUP1 or PUP2) period, regardless of the state
of the BUCK_ON and LDO_ON inputs.
In either the HR or POFF states, if either the BUCK_ON
or LDO_ON pin is driven high, the pushbutton circuitry
directly enters the PON state, without passing through
the power-up (PUP1 or PUP2) states. This is because by
asserting logic high on the BUCK_ON or LDO_ON pins,
the application has already told the LTC3553 exactly which
regulator(s) to turn on, so there is no need for an inter-
mediate PUP state in which both regulators are enabled
for five seconds.
Starting from the HR state, bringing the BUCK_ON and/
or LDO_ON pin(s) high enables the PowerPath, if it wasn’t
already enabled due to VBUS power being available. This
powers up the VOUT pin from VBUS or BAT. When the VOUT
voltage rises above the VOUT UVLO threshold, the state
machine transitions from the HR state into the PON state,
allowing the selected regulator(s) to turn on.
The hard reset (HRST) event is generated by pressing and
holding the pushbutton (ON input low) for five seconds.
For a valid HRST event to occur the button press must
start in the PUP1, PUP2 or PON state, but can end in any
state. If a valid HRST event is present in PON, PDN2 or
POFF, then the state machine will transition to the PDN1
state and subsequently transition to the HR state one
second later.
Debounced Pushbutton Output (PBSTAT)
In the PON, PUP1, and PUP2 states, the PBSTAT open-
drain output pin outputs a debounced version of the ON
pushbutton signal. ON must be held low for at least 50ms
for the pushbutton interface to recognize it and cause
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