LTC3708_15 Datasheet, PDF (24/32 Pages) Linear Technology – Fast 2-Phase, No RSENSE Buck Controller with Output Tracking

LTC3708
APPLICATIONS INFORMATION
V_OUT1
2.5V
10A
22μF
6.3V
X7R
V_IN
7V TO 28V
C_IN
BAT54A
10μF
5V
35V
+
s4
10Ω
4.7μF _1μF
BOOST2
V_CC
PGND1
+ C_OUT1
470μF
4V
PGND1
20k
1%
56pF
10k
1%
17 4 31 21
1μF
27
V_CC TRACK1 FCB DRV_{CC 14}
1μF
L1
1μH
M1
TG1
28 _BOOST1
0.22μF 26
TG2
BOOST2
13
BOOST2
M2
15
0.22μF
L2
1μH
SW1
SW2
25 _SENSE1+
SENSE2^{+ 16}
B340A
M3
22
BG1
LTC3708EUH
20
BG2
M4
B340A
31.6k
1% _VIN ^715k
R2
10k
1%
V_RNG2
0.01μF
24 _SENSE1–
23
PGND1
32
V_RNG1
29
3 ^ION1
6 ^VFB1
TRACK2
9
EXTLPF
2
I_TH1
RUN/SS
SENSE2^{– 18}
19
PGND2
11
V_RNG2
12
I_ON2
V_FB2
7
30
PWRGD
10
INTLPF
8
I_TH2
SGND
20k
511k
39k
20k
V_IN V_CC
1%
10k
11k
10k
1%
100pF
20k
1
5
100pF
0.022μF
680pF
0.1μF
680pF
0.01μF 1nF
3708 F13
C_IN: UNITED CHEMI-CON THCR60EIH106ZT
C_OUT1, C_OUT2: SANYO POSCAP 4TPD470M
L1, L2: SUMIDA CEP125-1R0M
M1, M2: VISHAY Si4884
M3, M4: VISHAY Si4874
+ C_OUT2
470μF
4V
V_OUT1
1.8V
10A
22μF
6.3V
X7R
56pF ^5V
100k
PGOOD
Figure 13. Design Example: 2.5V/10A and 1.8V/10A at 500kHz with Output Tracking
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3708. These items are also illustrated graphically in
Figure 14. Figure 15 further shows the current waveforms
present in the various branches of the 2-phase synchronous
Buck regulators operating in the continuous mode.
• Place the loop of M1, M3 and C_IN1 in a compact area.
This loop conducts high pulsating current and its area
needs to be minimized. Place M2, M4 and C_IN2 in the
same way.
• Place C_IN1 and C_IN2 within the distance of 1cm. Longer
distance may cause a large resonant loop.
• Connect the negative plates of C_OUT1 and C_DR1 to PGND1
before it joins PGND2 at the ground plane. Connect
C_OUT2 and C_DR2 in the same way so that power grounds
are separated before they meet at a single point.
• Cover the board area under the LTC3708 with a SGND
plane. For the LTC3708EUH, solder the back of the IC
to this plane. Separate SGND from the power ground
and connect all signal components (I_TH, V_FB, I_ON, V_CC,
EXTLPF, INTLPF, V_RNG, TRACK and RUN/SS) to the
SGND plane before it joins PGND. Connect SGND to
the gound plane at a single point.
• Run SENSE⁺ and SENSE^– across the bottom MOSFET
(or R_SENSE when a separate current sensing resistor
is used) with Kelvin connection (Figure 16). Route
SENSE⁺ and SENSE^– together with minimum PC trace
separation. The filter capacitor (when used) between
SENSE⁺ and SENSE^– should be as close to the LTC3708
as possible.
• Keep the high dV/dt nodes SW, TG and BOOST away
from sensitive small-signal nodes.
3708fb
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