LTC3708_15 Datasheet, PDF (22/32 Pages) Linear Technology – Fast 2-Phase, No RSENSE Buck Controller with Output Tracking

LTC3708
APPLICATIONS INFORMATION
2. Transition Loss. This loss arises from the brief amount
of time the top MOSFET spends in the saturated region
during switch node transitions. It depends upon the input
voltage, load current, driver strength and MOSFET capaci-
tance, among other factors. The loss is significant at input
voltages above 20V and can be estimated from:
Transition Loss ≈
(0.5) • V_IN2 • I_OUT • C_RSS • f •
⎛
R_{DS(ON)_DRV ⎝⎜ DRVCC}
1
− V_GS(TH)
+
1^⎞
V_{GS(TH) ⎠⎟}
3. DRV_CC and V_CC Current. This is the sum of the MOSFET
driver and control currents. The driver current supplies the
gate charge Q_G required to switch the power MOSFETs.
This current is typically much larger than the control circuit
current. In continuous mode operation:
I_GATECHG = f(Q_G(TOP) + Q_G(BOT))
4. C_IN Loss. The input capacitor has the difficult job of
filtering the large RMS input current to the regulator. It
must have a very low ESR to minimize the AC I²R loss and
sufficient capacitance to prevent the RMS current from
causing additional upstream losses in fuses or batteries.
The LTC3708 2-phase architecture typically halves this C_IN
loss over the single phase solutions.
Other losses, including C_OUT ESR loss, Schottky conduc-
tion loss during dead time and inductor core loss generally
account for less than 2% additional loss.
When making any adjustments to improve efficiency, the
final arbiter is the total input current for the regulator at
your operating point. If you make a change and the input
current decreases, then you improve the efficiency. If there
is no change in input current, then there is no change in
efficiency.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V_OUT immediately shifts by an amount
equal to ΔI_LOAD (ESR), where ESR is the effective series
resistance of C_OUT. ΔI_LOAD also begins to charge or dis-
charge C_OUT generating a feedback error signal used by the
regulator to return V_OUT to its steady-state value. During
this recovery time, V_OUT can be monitored for overshoot
or ringing that would indicate a stability problems. The
I_TH pin external components shown in Figure 13 will pro-
vide adequate compensation for most applications. For a
detailed explanation of switching control loop theory see
Linear Technology Application Note 76.
Design Example
As a design example, take a supply with the following
specifications: V_IN = 7V to 28V (15V nominal), V_OUT1
= 2.5V, V_OUT2 = 1.8V, I_OUT1(MAX) = I_OUT2(MAX) = 10A,
f = 500kHz and V_OUT2 to track V_OUT1.
First calculate the timing resistor:
R_ON1
=
2.5V
(^0.7V)(^500kHz)(^10pF)
=
714k
Select a standard value of 715k.
R_ON2
=
1.8V
(^0.7V)(^500kHz)(^10pF)
=
514k
Select a standard value of 511k.
Next, choose the feedback resistors:
R1 ₌ 2.5V _{– 1= 3.17}
R2 0.6V
Select R1 = 31.6k, R2 = 10k.
R3 ₌ 1.8V _{– 1= 2}
R4 0.6V
Select R3 = 20k, R4 = 10k.
For V_OUT2 to coincidently track V_OUT1 at start-up, connect
an extra pair of R3 and R4 across V_OUT1 with its midpoint
tied to the TRACK2 pin.
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