LTC3112_15 Datasheet, PDF (24/32 Pages) Linear Technology – 15V, 2.5A Synchronous Buck-Boost DC/DC Converter

LTC3112
Applications Information
C_POLE
=
2π
1
(^33kΩ) (^250kHz)
≅
22pF
Next, C_FF can be chosen to set the second zero, f_ZERO2, to
the common zero frequency of 5kHz.
C_FF
=
2π
1
(^845kΩ)(^5kHz)
≅
40pF
In this case C_FF was selected at 47pF giving a lower fre­
quency of 4kHz for the second zero. Finally, the resistor
value R_FF can be chosen to place the second pole.
R_FF
=
2π
1
(^47pF)(^250kHz)
≅
13kΩ
A 10kΩ is chosen giving a 325kHz pole frequency. Now
that the pole frequencies, zero frequencies and gain of the
compensation network have been established, the next
step is to generate a Bode plot for the compensated error
amplifier to confirm its gain and phase properties. A Bode
plot of the error amplifier with the designed compensation
component values is shown in Figure 10. The Bode plot
confirms that the peak phase occurs near 30kHz and the
phase boost at that point is around 60°. In addition, the
gain at the peak phase frequency is –10db, close to the
design target.
100
100
50
50
GAIN
0
0
–50
–50
–100
PHASE
–100
–150
–200
10
–150
f_C
100
1k
10k 100k
FREQUENCY (Hz)
–200
1M
3112 F10
Figure 10. Compensated Error Amplifier Bode Plot.
The final step in the design process is to compute the Bode
plot for the entire loop using the designed compensation
network and confirm its phase margin and crossover
frequency. The complete loop Bode plot for this example
is shown in Figure 11. The resulting loop crossover fre-
quency is 25kHz and the phase margin is approximately
60°. The crossover frequency is a bit lower than the design
target of 35kHz, but farther away from the troublesome
right half plane zero.
60
180
PHASE
40
120
20
60
GAIN
0
0
–20
–60
–40
–60
10
–120
f_C
100
1k
10k 100k
FREQUENCY (Hz)
–180
1M
3112 F11
Figure 11. Complete Loop Bode Plot.
This feedback design example was done at 3.5V_IN, 5V_OUT,
and a 1A load current. The phase margin in boost mode
will decrease at lower V_INs, higher V_OUTs, load currents,
or inductor values due to the right half plane zero shifting
to a lower frequency.
As a reminder, the amount of power stage Q at the L-C
resonant frequency is highly dependent on the R_S term
(series resistance) which includes the ESR of the inductor
and the LTC3112’s low R_ON MOSFETs. Lower total series
resistances give a higher Q, making the feedback design
more difficult. Higher series resistances lower the Q,
resulting in a lower loop cross over frequency.
The Bode plot for the complete loop should be checked over
all operating conditions and for variations in component
values to ensure that sufficient phase margin exists in all
cases. The stability of the loop should also be confirmed
via time domain simulation and by evaluating the transient
response of the converter in the actual circuit.
3112fc
24
For more information www.linear.com/LTC3112