LTC3865-1_15 Datasheet, PDF (23/38 Pages) Linear Technology – Dual, 2-Phase Synchronous DC/DC Controller with Pin Selectable Outputs

LTC3865/LTC3865-1
APPLICATIONS INFORMATION
maximum RMS current of one channel must be used. The
maximum RMS capacitor current is given by:
( )( ) ^C_IN
Required
I_RMS
≈
I_MAX
V_IN
⎡⎣
V_OUT
V_IN – V_OUT ⎤⎦^1/2
This formula has a maximum at V_IN = 2V_OUT, where
I_RMS = I_OUT/2. This simple worst-case condition is com-
monly used for design because even significant deviations
do not offer much relief. Note that capacitor manufacturers’
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the capaci-
tor, or to choose a capacitor rated at a higher temperature
than required. Several capacitors may be paralleled to meet
size or height requirements in the design. Due to the high
operating frequency of the LTC3865, ceramic capacitors
can also be used for C_IN. Always consult the manufacturer
if there is any question.
The benefit of the LTC3865/LTC3865-1 2-phase operation
can be calculated by using the equation above for the higher
power controller and then calculating the loss that would
have resulted if both controller channels switched on at
the same time. The total RMS power lost is lower when
both controllers are operating due to the reduced overlap of
current pulses required through the input capacitor’s ESR.
This is why the input capacitor’s requirement calculated
above for the worst-case controller is adequate for the dual
controller design. Also, the input protection fuse resistance,
battery resistance, and PC board trace resistance losses
are also reduced due to the reduced peak currents in a
2-phase system. The overall benefit of a multiphase design
will only be fully realized when the source impedance of the
power supply/battery is included in the efficiency testing.
The sources of the top MOSFETs should be placed within
1cm of each other and share a common C_IN(s). Separating
the sources and C_IN may produce undesirable voltage and
current resonances at V_IN.
A small (0.1μF to 1μF) bypass capacitor between the chip V_IN
pin and ground, placed close to the LTC3865/LTC3865-1,
is also suggested. A 2.2Ω to 10Ω resistor placed between
C_IN (C1) and the V_IN pin provides further isolation between
the two channels.
The selection of C_OUT is driven by the effective series
resistance (ESR). Typically, once the ESR requirement
is satisfied, the capacitance is adequate for filtering. The
output ripple (ΔV_OUT) is approximated by:
ΔV_OUT
≈ I_RIPPLE
⎛
⎝⎜ ^ESR
+
1
8fC_OUT
⎞
⎠⎟
where f is the operating frequency, C_OUT is the output
capacitance and I_RIPPLE is the ripple current in the induc-
tor. The output ripple is highest at maximum input voltage
since I_RIPPLE increases with input voltage.
Setting Output Voltage
The LTC3865/LTC3865-1 output voltages are each set
by the voltages at VID pins. Each of the VID pins can be
floated, or INTV_CC or grounded, depending on what preset
voltages are needed at the output (Table 1).
If the desired output voltage is not one of the preset
values, select 0.6V and use 1% resistors to divide V_OUT,
as shown in Figure 9. The regulated output voltage is
determined by:
V_OUT
=
0.6V
•
⎛
⎝⎜
1+
R_B
R_A
⎞
⎠⎟
To improve the frequency response, a feed-forward ca-
pacitor, C_FF, may be used. Great care should be taken to
route the V_OSENSE line away from noise sources, such as
the inductor or the SW line.
V_OUT
1/2 LTC3865
V_OSENSE
R_B
C_FF
R_A
3865 F09
Figure 9. Setting Output Voltage
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