LTC3865-1_15 Datasheet, PDF (22/38 Pages) Linear Technology – Dual, 2-Phase Synchronous DC/DC Controller with Pin Selectable Outputs

LTC3865/LTC3865-1
APPLICATIONS INFORMATION
For applications where the main input power is below 5V,
tie the V_IN and INTV_CC pins together and tie the combined
pins to the 5V input with a 1Ω or 2.2Ω resistor as shown
in Figure 8 to minimize the voltage drop caused by the
gate charge current. This will override the INTV_CC linear
regulator and will prevent INTV_CC from dropping too low
due to the dropout voltage. Make sure the INTV_CC voltage
is at or exceeds the R_DS(ON) test voltage for the MOSFET
which is typically 4.5V for logic-level devices.
Topside MOSFET Driver Supply (C_B, D_B)
External bootstrap capacitors, C_B, connected to the BOOST
pins supply the gate drive voltages for the topside MOSFETs.
Capacitor C_B in the Functional Diagram is charged through
external diode D_B from INTV_CC when the SW pin is low.
When one of the topside MOSFETs is to be turned on, the
driver places the C_B voltage across the gate source of the
desired MOSFET. This enhances the MOSFET and turns on
the topside switch. The switch node voltage, SW, rises to
V_IN and the BOOST pin follows. With the topside MOSFET
on, the boost voltage is above the input supply: V_BOOST
= V_IN + V_INTVCC. The value of the boost capacitor, C_B,
needs to be 100 times that of the total input capacitance
of the topside MOSFET(s). The reverse breakdown of the
external Schottky diode must be greater than V_IN(MAX).
When adjusting the gate drive level, the final arbiter is the
total input current for the regulator. If a change is made
and the input current decreases, then the efficiency has
improved. If there is no change in input current, then there
is no change in efficiency.
V_IN
LTC3865
INTV_CC
R_VIN
1Ω
+ _CINTVCC
4.7μF
5V
C_IN
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Figure 8. Setup for a 5V Input
Undervoltage Lockout
The LTC3865/LTC3865-1 have two functions that help
protect the controller in case of undervoltage conditions.
A precision UVLO comparator constantly monitors the
INTV_CC voltage to ensure that an adequate gate-drive
voltage is present. It locks out the switching action when
INTV_CC is below 3.3V. To prevent oscillation when there is
a disturbance on the INTV_CC, the UVLO comparator has
550mV of precision hysteresis.
Another way to detect an undervoltage condition is to
monitor the V_IN supply. Because the RUN pins have a
precision turn-on reference of 1.22V, one can use a resistor
divider to V_IN to turn on the IC when V_IN is high enough.
An extra 4.5μA of current flows out of the RUN pin once
the RUN pin voltage passes 1.22V. One can program the
hysteresis of the run comparator by adjusting the values
of the resistive divider. For accurate V_IN undervoltage
detection, V_IN needs to be higher than 4.5V.
C_IN and C_OUT Selection
The selection of C_IN is simplified by the 2-phase architec-
ture and its impact on the worst-case RMS current drawn
through the input network (battery/fuse/capacitor). It can be
shown that the worst-case capacitor RMS current occurs
when only one controller is operating. The controller with
the highest (V_OUT)(I_OUT) product needs to be used in the
formula below to determine the maximum RMS capacitor
current requirement. Increasing the output current drawn
from the other controller will actually decrease the input
RMS ripple current from its maximum value. The out-of-
phase technique typically reduces the input capacitor’s RMS
ripple current by a factor of 30% to 70% when compared
to a single phase power supply solution.
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle (V_OUT)/(V_IN). To prevent
large voltage transients, a low ESR capacitor sized for the
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