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LTC3734_15 Datasheet, PDF (23/28 Pages) Linear Technology – Single-Phase, High Efficiency DC/DC Controller for Intel Mobile CPUs
LTC3734
APPLICATIONS INFORMATION
The power loss dissipated by the top MOSFET can be cal-
culated with equations 3 and 7. Using a Fairchild FDS7760
as an example: RDS(ON) = 8mΩ, QG = 55nC at 5V VGS, CRSS
= 307pF, VTH(MIN) = 1V. At maximum input voltage with
TJ(estimated) = 85°C at an elevated ambient temperature:
( ) PTOP
=
1.5V
21V
•
20A2
•
1+ 0.005 • (85°C – 25°C)
•
0.008Ω + 21V 2 • 20A • 350kHz • 307pF •
2
2Ω
•


5V
1
–
1V
+
1
1V


=
1.48W
Equation 4 gives the worst-case power loss dissipated
by the bottom MOSFET (assuming FDS7760 and TJ =
85°C again):
PBOT
=
21V – 1.5V
21V
•
20A
2
•
(1+ 0.005 •(85°C – 25°C)) • 0.008Ω
= 3.86W
Therefore, it is necessary to have two FDS7760s in par-
allel to split the power loss for both the top and bottom
MOSFETS.
A short-circuit to ground will result in a folded back cur-
rent of about:
ISC
=
25mV
0.002Ω
+
1
2
•


200ns • 21V
0.5µH


=
16.7A
The worst-case power dissipation by the bottom MOSFET
under short-circuit conditions is:
1 – 200ns
PBOT
=
350kHz
1
• 16.7A2 •
350kHz
(1+ 0.005 •(85°C – 25°C)) • 0.008Ω
= 2.7W
which is less than normal, full load conditions.
The RMS input ripple current will be:
IINRMS = 20A/2 = 10A
An input capacitor(s) with a 10A RMS current rating is
required.
The output capacitor ripple current is calculated. The out-
put ripple will be highest at the maximum input voltage:
∆IOUT(MAX )
=
1.5V
350kHz • 0.5µH
•


1−
1.5 
2.1
=
8AP-P
Assuming the ESR of output capacitor(s) is 5mΩ, the
output ripple voltage is:
∆VOUT
≈
8AP-P


5mΩ
+
8
•
350kHz
1
•(
4
•
270µF)


= 42.6mVP-P
3734fa
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