LTC3727-1_15 Datasheet, PDF (22/32 Pages) Linear Technology – High Efficiency, 2-Phase Synchronous Step-Down Switching Regulators

LTC3727/LTC3727-1
APPLICATIO S I FOR ATIO
be drawn from the inductor primary in order to extract
power from the auxiliary windings. With the loop in
continuous mode, the auxiliary outputs may nominally be
loaded without regard to the primary output load.
The secondary output voltage V_SEC is normally set as
shown in Figure 6 by the turns ratio N of the transformer:
V_SEC ≅ (N + 1) V_OUT
However, if the controller goes into Burst Mode operation
and halts switching due to a light primary load current,
then V_SEC will droop. An external resistive divider from
V_SEC to the FCB pin sets a minimum voltage V_SEC(MIN):
V_SEC(MIN) ≅ 0.8V^{⎛⎝⎜}1+ ^{RR65⎞⎠⎟}
where R5 and R6 are shown in Figure 2.
If V_SEC drops below this level, the FCB voltage forces
temporary continuous switching operation until V_SEC is
again above its minimum.
In order to prevent erratic operation if no external connec-
tions are made to the FCB pin, the FCB pin has a 0.18μA
internal current source pulling the pin high. Include this
current when choosing resistor values R5 and R6.
The following table summarizes the possible states avail-
able on the FCB pin:
Table 1
FCB PIN
0V to 0.75V
0.85V < V_FCB < 6.8V
Feedback Resistors
> 7.3V
CONDITION
Forced Continuous Both Controllers
(Current Reversal Allowed—
Burst Inhibited)
Minimum Peak Current Induces
Burst Mode Operation
No Current Reversal Allowed
Regulating a Secondary Winding
Burst Mode Operation Disabled
Constant Frequency Mode Enabled
No Current Reversal Allowed No
Minimum Peak Current
Voltage Positioning
Voltage positioning can be used to minimize peak-to-peak
output voltage excursions under worst-case transient
22
loading conditions. The open-loop DC gain of the control
loop is reduced depending upon the maximum load step
specifications. Voltage positioning can easily be added to
the LTC3727 by loading the I_TH pin with a resistive divider
having a Thevenin equivalent voltage source equal to the
midpoint operating voltage range of the error amplifier, or
1.2V (see Figure 8).
The resistive load reduces the DC loop gain while main-
taining the linear control range of the error amplifier. The
maximum output voltage deviation can theoretically be
reduced to half or alternatively the amount of output
capacitance can be reduced for a particular application. A
complete explanation is included in Design Solutions 10
(see www.Linear.com).
INTV_CC
R_T2
R_T1
I_TH
R_C
LTC3727
C_C
3727 F08
Figure 8. Active Voltage Positioning Applied to the LTC3727
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can be
expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC3727 circuits: 1) LTC3727 V_IN current (in-
cluding loading on the 3.3V internal regulator), 2) INTV_CC
regulator current, 3) I²R losses, 4) Topside MOSFET
transition losses.
1. The V_IN current has two components: the first is the DC
supply current given in the Electrical Characteristics table,
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