LTC3727-1_15 Datasheet, PDF (13/32 Pages) Linear Technology – High Efficiency, 2-Phase Synchronous Step-Down Switching Regulators

LTC3727/LTC3727-1
APPLICATIO S I FOR ATIO
Figure 1 on the first page is a basic LTC3727/LTC3727-1
application circuit. External component selection is driven
by the load requirement, and begins with the selection of
R_SENSE and the inductor value. Next, the power MOSFETs
and D1 are selected. Finally, C_IN and C_OUT are selected.
The circuit shown in Figure 1 can be configured for
operation up to an input voltage of 28V (limited by the
external MOSFETs).
R_SENSE Selection For Output Current
R_SENSE is chosen based on the required output current.
The LTC3727 current comparator has a maximum thresh-
old of 135mV/R_SENSE and an input common mode range
of SGND to 14V. The current comparator threshold sets
the peak of the inductor current, yielding a maximum
average output current I_MAX equal to the peak value less
half the peak-to-peak ripple current, ΔI_L.
Allowing a margin for variations in the LTC3727 and
external component values yields:
R_SENSE
=
90mV
I_MAX
When using the controller in very low dropout conditions,
the maximum output current level will be reduced due to
the internal compensation required to meet stability crite-
rion for buck regulators operating at greater than 50%
duty factor. A curve is provided to estimate this reducton
in peak output current level depending upon the operating
duty factor.
Operating Frequency
The LTC3727 uses a constant frequency phase-lockable
architecture with the frequency determined by an internal
capacitor. This capacitor is charged by a fixed current plus
an additional current which is proportional to the voltage
applied to the PLLFLTR pin. Refer to Phase-Locked Loop
and Frequency Synchronization in the Applications Infor-
mation section for additional information.
A graph for the voltage applied to the PLLFLTR pin vs
frequency is given in Figure 5. As the operating frequency
2.5
2.0
1.5
1.0
0.5
0
200 250 300 350 400 450 500 550
OPERATING FREQUENCY (kHz)
3727 F05
Figure 5. PLLFLTR Pin Voltage vs Frequency
is increased the gate charge losses will be higher, reducing
efficiency (see Efficiency Considerations). The maximum
switching frequency is approximately 550kHz.
Inductor Value Calculation
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is efficiency. A higher
frequency generally results in lower efficiency because of
MOSFET gate charge losses. In addition to this basic
trade-off, the effect of inductor value on ripple current and
low current operation must also be considered.
The inductor value has a direct effect on ripple current. The
inductor ripple current ΔI_L decreases with higher induc-
tance or frequency and increases with higher V_IN:
ΔI_L
=
1
(f)(L)
V_OUT
⎛
⎝⎜
1–
V_OUT
V_IN
⎞
⎠⎟
Accepting larger values of ΔI_L allows the use of low
inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is ΔI_L = 0.3(I_MAX). The maximum ΔI_L
occurs at the maximum input voltage.
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