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LTC4040_15 Datasheet, PDF (21/26 Pages) Linear Technology – 2.5A Battery Backup Power Manager
LTC4040
Applications Information
the inductor current will have to reverse from 2.5A (from
SW to BAT) to as high as the boost current limit of ap-
proximately 6.5A (from BAT to SW). That is a 9A current
change in the inductor with a slope of VBAT/L. At a low
battery voltage of 3.2V, this might take almost 3µs even
with a 1µH inductor. During this transition, CSYS, the ca-
pacitor on the VSYS pin, will have to deliver the shortfall
until the inductor current is caught up with the system
load demand, and the capacitor will deplete according to
the following equation:
CSYS
=
ILOAD
•
∆t
∆V
The size of the capacitor should be big enough to hold the
system voltage, VSYS, up above the reset threshold during
this transition. For a system load ILOAD = 2.5A, transition
time ∆t = 3µs, if the maximum droop ∆V allowed in the
system output is 100mV, the required capacitance at the
VSYS pin should be at least 75µF.
The other consideration for choosing VSYS capacitor size
is the maximum acceptable output voltage ripple during
steady-state backup boost operation. For a given duty
cycle of D and load of ILOAD, the output ripple VRIP of a
boost converter is calculated using the following equation:
VRIP
=
ILOAD
CSYS
•D•
1
fOSC
If the maximum allowable ripple is 20mV under 2.5A
steady-state load while boosting from 3.2V to 5V
(D = 36%), the required capacitance at VSYS is calculated to
be at least 40µF using the above equation. Please refer to
Table 4 for recommended ceramic capacitor manufacturers.
Table 4. Recommended Ceramic Capacitor Manufacturers
AVX
www.avxcorp.com
Murata
www.murata.com
Taiyo Yuden
www.t-yuden.com
Vishay Siliconix
www.vishay.com
TDK
www.tdk.com
Battery Charger Stability Considerations
The LTC4040’s switching battery charger contains three
control loops: constant-voltage, constant-current, and
input current limit loop, all of which are internally com-
pensated. However, various external conditions like load
and component values may interfere with the internal
compensation and cause instability. For example, the
constant-voltage loop may become unstable due to reduced
phase margin if more than 100µF capacitance is added in
parallel with the actual battery at the BAT pin.
In constant-current mode, the PROG pin is in the feedback
loop rather than the BAT pin. Because of the additional
pole created by any PROG pin capacitance, capacitance
on this pin must be kept to a minimum. For the constant-
current loop to be stable, the pole frequency at the PROG
pin should be kept above 1MHz. Therefore, if the PROG
pin has a parasitic capacitance, CPROG, the following equa-
tion should be used to calculate the maximum resistance
value for RPROG:
RPROG
≤
2π
•
1
1MHz
•
CPROG
Alternatively, for RPROG = 4k (500mA setting), the maxi-
mum allowable capacitance on the PROG pin is 40pF. If
any measuring device is attached to the PROG pin for
monitoring the charge current, a 1M isolation resistor
should be inserted between the PROG pin and the device.
Backup Boost Stability Considerations
The LTC4040’s backup boost converter is internally com-
pensated. However, system capacitance less than 100µF
or over 1000µF will adversely affect the phase margin and
hence the stability of the converter.
Also, if the right-half-plane (RHP) zero moves down in
frequency due to external load conditions and the choice
of the inductor value, that may also reduce the phase
margin and cause instability. If the output power is POUT,
inductor value is L, efficiency is η and the input to the
For more information www.linear.com/LTC4040
4040fa
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