LTC3552 Datasheet, PDF (21/24 Pages) Linear Technology – Standalone Linear Li-Ion Battery Charger and Dual Synchronous Buck Converter

LTC3552
APPLICATIO S I FOR ATIO
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3552. These items are also illustrated graphically
in the layout diagram of Figure 5. Check the following in
your layout:
1. Does the capacitor C_S connect to the power V_CC and GND
(exposed pad) as closely as possible? This capacitor
provides the AC current to the internal power MOSFETs
and their drivers.
2. The feedback signals V_FB should be routed away from
noisy components and traces, such as the SW line, and
its trace should be minimized.
3. Are the C_OUT and L1 closely connected? The (–)
plate of C_OUT returns current to GND and the (–) plate
of C_S.
4. Keep sensitive components away from the SW pins.
The input capacitor C_S should be routed away from the
SW traces and the inductors.
5. A ground plane is preferred, but if not available, keep
the signal and power grounds segregated with small
signal components returning to the GND pin at one
point and should not share the high current path of
C_S or C_OUT.
6. Flood all unused areas on all layers with copper. Flooding
with copper will reduce the temperature rise of power
components. These copper areas should be connected
to V_CC or GND.
V_OUT2
V_IN
C_IN
V_IN V_CC
POR
MODE/SYNC
C_S
LTC3552
L2
L1
SW2
SW1
C5
C4
V_OUT1
R4
C_OUT2
R3
V_FB2
V_FB1
GND
R1
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 5. Layout Diagram
R2
C_OUT1
3552 F05
V_IN
GND
V_OUT1
C_OUT1
C4 R2
R1
VIA TO V_FB1
GND
VIA TO V_FB2
R3
C5 R4
V_OUT2
3552 F06
Figure 6. Suggested Layout
3552f
21