LTC3552 Datasheet, PDF (16/24 Pages) Linear Technology – Standalone Linear Li-Ion Battery Charger and Dual Synchronous Buck Converter

LTC3552
APPLICATIO S I FOR ATIO
Ceramic Input and Output Capacitors
Higher value, lower cost ceramic capacitors are now be-
coming available in smaller case sizes. These are tempting
for switching regulator use because of their very low ESR.
Unfortunately, the ESR is so low that it can cause loop
stability problems. Solid tantalum capacitor ESR generates
a loop “zero” at 5kHz to 50kHz that is instrumental in giving
acceptable loop phase margin. Ceramic capacitors remain
capacitive to beyond 300kHz and usually resonate with their
ESL before ESR becomes effective. Also, ceramic caps are
prone to temperature effects which requires the designer
to check loop stability over the operating temperature
range. To minimize their large temperature and voltage
coefficients, only X5R or X7R ceramic capacitors should
be used. A good selection of ceramic capacitors is available
from Taiyo Yuden, AVX, Kemet, TDK, and Murata.
Great care must be taken when using only ceramic input
and output capacitors. When a ceramic capacitor is used
at the input and the power is being supplied through long
wires, such as from a wall adapter, a load step at the output
can induce ringing at the V_CC pin. At best, this ringing can
couple to the output and be mistaken as loop instability.
At worst, the ringing at the input can be large enough to
damage the part.
Since the ESR of a ceramic capacitor is very low, the input
and output capacitor must instead fulfill a charge storage
requirement. During a load step, the output capacitor must
instantaneously supply the current to support the load
until the feedback loop raises the switch current enough
to support the load. The time required for the feedback
loop to respond is dependent on the compensation and
the output capacitor size. Typically, 3-4 cycles are required
to respond to a load step, but only in the first cycle does
the output drop linearly. The output droop, V_DROOP, is
usually about 2-3 times the linear drop of the first cycle.
Thus, a good place to start is with the output capacitor
size of approximately:
C_OUT
≈
⎛
2.5_⎝⎜
f_O
∆I_OUT
• V_DROOP
⎞
⎠⎟
More capacitance may be required depending on the duty
cycle and load step requirements. In most applications,
the input capacitor is merely required to supply high
frequency bypassing, since the impedance to the supply
is very low. A 10µF ceramic capacitor is usually enough
for these conditions.
Setting the Output Voltage
The switching regulator develops a 0.6V reference voltage
between the feedback pin, V_FB, and the ground as shown
in Figure 2. The output voltage is set by a resistive divider
according to the following formula:
V_OUT
=
0.6V
⎛
⎝⎜
1+
R2 ⎞
R1⎠⎟
Keeping the current low (< 5µA) in these resistors maxi-
mizes efficiency, but making it too low may allow stray
capacitance to cause noise problems and reduce the phase
margin of the error amplifier loop.
To improve the frequency response, a feed-forward capaci-
tor, C_FF, may also be used. Great care should be taken to
route the V_FB line away from noise sources, such as the
inductor or the SW line.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V_OUT immediately shifts by an amount
equal to ΔI_LOAD • ESR, where ESR is the effective series
resistance of C_OUT. ΔI_LOAD also begins to charge or dis-
charge C_OUT, generating a feedback error signal used by the
regulator to return V_OUT to its steady-state value. During
this recovery time, V_OUT can be monitored for overshoot
or ringing that would indicate a stability problem.
The output voltage settling behavior is related to the sta-
bility of the closed-loop system and will demonstrate the
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