LTC3868-1 Datasheet, PDF (20/38 Pages) Linear Technology – Low IQ, Dual 2-Phase Synchronous Step-Down Controller

LTC3868-1
Applications Information
Equation 1 has a maximum at V_IN = 2V_OUT , where I_RMS
= I_OUT/2. This simple worst-case condition is commonly
used for design because even significant deviations do not
offer much relief. Note that capacitor manufacturers’ ripple
current ratings are often based on only 2000 hours of life.
This makes it advisable to further derate the capacitor, or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may be paralleled to meet
size or height requirements in the design. Due to the high
operating frequency of the LTC3868-1, ceramic capacitors
can also be used for C_IN. Always consult the manufacturer
if there is any question.
The benefit of the LTC3868-1 2-phase operation can be
calculated by using Equation 1 for the higher power control-
ler and then calculating the loss that would have resulted
if both controller channels switched on at the same time.
The total RMS power lost is lower when both controllers
are operating due to the reduced overlap of current pulses
required through the input capacitor’s ESR. This is why
the input capacitor’s requirement calculated above for the
worst-case controller is adequate for the dual controller
design. Also, the input protection fuse resistance, battery
resistance, and PC board trace resistance losses are also
reduced due to the reduced peak currents in a 2-phase
system. The overall benefit of a multiphase design will
only be fully realized when the source impedance of the
power supply/battery is included in the efficiency testing.
The sources of the top MOSFETs should be placed within
1cm of each other and share a common C_IN(s). Separating
the sources and C_IN may produce undesirable voltage and
current resonances at V_IN.
A small (0.1µF to 1µF) bypass capacitor between the chip
V_IN pin and ground, placed close to the LTC3868-1, is
also suggested. A 10Ω resistor placed between C_IN (C1)
and the V_IN pin provides further isolation between the
two channels.
The selection of C_OUT is driven by the effective series
resistance (ESR). Typically, once the ESR requirement
is satisfied, the capacitance is adequate for filtering. The
output ripple (∆V_OUT) is approximated by:
ΔV_OUT
≈

ΔI_L ESR +

8
•
f
1
• C_OUT



20
where f is the operating frequency, C_OUT is the output
capacitance and ∆I_L is the ripple current in the inductor.
The output ripple is highest at maximum input voltage
since ∆I_L increases with input voltage.
Setting Output Voltage
The LTC3868-1 output voltages are each set by an exter-
nal feedback resistor divider carefully placed across the
output, as shown in Figure 6. The regulated output voltage
is determined by:
V_OUT
=

0.8V 1+

R_B
R_A



To improve the frequency response, a feedforward ca-
pacitor, C_FF , may be used. Great care should be taken to
route the V_FB line away from noise sources, such as the
inductor or the SW line.
V_OUT
1/2 LTC3868-1
V_FB
R_B
C_FF
R_A
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Figure 6. Setting Output Voltage
Soft-Start (SS Pins)
The start-up of each V_OUT is controlled by the voltage on
the respective SS pin. When the voltage on the SS pin
is less than the internal 0.8V reference, the LTC3868-1
regulates the V_FB pin voltage to the voltage on the SS pin
instead of 0.8V. The SS pin can be used to program an
external soft-start function.
Soft-start is enabled by simply connecting a capacitor from
the SS pin to ground, as shown in Figure 7. An internal
1µA current source charges the capacitor, providing a
1/2 LTC3868-1
SS
C_SS
SGND
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Figure 7. Using the SS Pin to Program Soft-Start
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